ADMV8913

• 适用于 ADMV8913 的功能完备的评估板 
• 用于 SPI 的板载 SDP-S 连接器 
• 使用由用于 SPI 控制的 USB ACE 软件接口供电的板载 LDO 稳压器进行评估 

ADMV8913-EVALZ 可用于评估 ADMV8913 数字可调、高通滤波器 (HPF) 和低通滤波器 (LPF)。ADMV8913-EVALZ 集成了 ADMV8913 芯片、负电压发生器、低压降 (LDO) 调节器，以及连接 EVAL-SDP-CS1Z (SDP-S) 系统演示平台 (SDP) 的接口，可实现简单高效的评估。负电压发生器和 LDO 稳压器允许 ADMV8913 通过 SDP-S 的由 PC 提供 5 V USB 电源电压，或使用两个外部电源供电。

ADMV8913 是一款完全单片微波集成电路 (MMIC)，具有数字可选的工作频率。该芯片具有集成的高通滤波器，后跟集成的低通滤波器，并允许 X 波段频率范围内的通带响应。该芯片可以使用并行逻辑接口或 4 线串行端口接口 (SPI) 进行编程。利用 SDP-S 控制器，用户可以通过 ADI 公司的分析、控制、评估 (ACE) 软件来连接 ADMV4530 SPI。

有关 ADMV8913 的完整详细信息，请参阅 ADMV8913 数据手册，在使用 ADMV8913-EVALZ 时，必须同时参阅该数据手册和本用户指南。

• Multi-Channel, Wideband System Development Platform Using Apollo (AD9084)
• Mates With Xilinx VCU118 Evaluation Board (Not Included)
• 16x RF Receive (Rx) Channels
• Total 16x 8GSPS to 20GSPS ADC
• Digital Down Converters (DDCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
• Programmable Finite Impulse Response Filters (pFIRs)
• Complex Finite Impulse Response Filters (CFIRs)
• 16x RF Transmit (Tx) Channels
• Total 16x 8GSPS to 28GSPS DAC
• Digital Up Converters (DUCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
• Programmable Finite Impulse Response Filters (pFIRs)
• Complex Finite Impulse Response Filters (CFIRs)
• Flexible Rx & Tx RF Front-Ends
• Rx: Filtering, Amplification, Digital Step Attenuation for Gain Control
• Tx: Filtering, Amplification
• Flexible Clock Distribution
• On-Board Clock Distribution from Single External 400MHz Reference
• Support for External Converter Clock per AD9084 via solder rework
• On-Board Power Regulation from Single 12V Power Adapter (Included)

• Mates to ADXBAND16EBZ Digitizing Card & VCU118 PMOD Interface (Cable Included)
• Provides Both Individual Adjacent Channel Loopback and Combined Channel Loopback Options
• Combined Tx Channels Out Option
• Combined Rx Channels In Option

Easy Control Tools and Platform Interfaces to Simplify Software Framework Developments:

• IIO Oscilloscope GUI
• MATLAB Add-Ons & Example Scripts
• Example HDL Builds including JESD204C Bring-Up
• Embedded Software Solutions for Linux and Device Drivers

• Multi-Chip Synchronization for Power-Up Phase Determinism
• System-Level Amplitude/Phase Alignment Using NCOs
• Low-Latency ADC-to-DAC Loopback Bypassing JESD Interface
• pFIR Control for Broadband Channel-to-Channel Amplitude/Phase Alignment
• Fast-Frequency Hopping

The ADXBAND16EBZ contains four AD9084 mixed‑signal front‑end devices, including the RF front end, clocking, and power circuitry. The ADXBAND16EBZ serves as a complete system solution targeting common applications such as phased‑array radars, wideband systems, and ground‑based SATCOM. Its primary target application is a 16‑Tx/16‑Rx direct X‑band sampling phased array.

The platform is intended as a testbed for demonstrating multi‑chip synchronization, as well as implementing system‑level calibrations, beamforming algorithms, and other signal‑processing techniques. The system is designed to interface with the VCU118 Evaluation Board from Xilinx^®, which features the Virtex^® UltraScale+™ XCVU9P FPGA, along with provided reference software, HDL code, and MATLAB system‑level interfaces.

A 16‑Tx/16‑Rx Calibration Board can be used to develop system‑level calibration algorithms, including demonstrations of power‑up phase determinism. The Calibration Board provides improvements in combined‑channel dynamic range, spurious performance, and phase noise, and can be controlled via a MATLAB add‑on when connected to the PMOD interface of the VCU118.