The AD7625 is a 16-bit, 6 MSPS, charge redistribution successive approximation register (SAR) based architecture analog-to-digital converter (ADC). SAR architecture allows unmatched perfor-mance both in noise (93 dB SNR) and in linearity (1 LSB). The AD7625 contains a high speed, 16-bit sampling ADC, an internal conversion clock, and an internal buffered reference. On the CNV± rising edge, it samples the voltage difference between the IN+ and IN− pins. The voltages on these pins swing in opposite phase between 0 V and REF. The 4.096 V reference voltage, REF, can be generated internally or applied externally.
All converted results are available on a single LVDS self-clocked or echoed-clock serial interface, reducing external hardware connections.
The AD7625 is housed in a 32-lead, 5 mm × 5 mm LFCSP with operation specified from −40°C to +85°C.
|Title||Content Type||File Type|
|AD7625: 16-Bit, 6MSPS, PulSAR Differential ADC Data Sheet (Rev A, 07/2012) (pdf, 268 kB)||Data Sheets|
|A 16-Bit, 6 MSPS SAR ADC System with Low Power Input Drivers and Reference Optimized for Multiplexed Applications (pdf, 457 kB)||Circuit Note|
|CN-0080: High Speed, Precision, Differential AC-Coupled Drive Circuit for 16-Bit, 6 MSPS AD7625 PulSAR ADC (pdf, 214 kB)||Circuit Note|
|EVAL-AD7625/AD7626EDZ: Evaluation Board for AD7625/AD7626 (Preliminary Rev, PrC) (pdf, 2517 kB)||User Guides|
|MS-2210: Designing Power Supplies for High Speed ADC (pdf, 327 kB)||Technical Articles|
|RAQs index||Rarely Asked Questions||HTML|
|Glossary of EE Terms||Glossary||HTML|
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