LTC3617
Info : RECOMMENDED FOR NEW DESIGNS
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LTC3617

±6A Monolithic Synchronous Step-Down Regulator for DDR Termination

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Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Details
Part Models 4
1ku List Price Starting From $4.55
Features
  • ±6A Output Current
  • 2.25V to 5.5V Input Voltage Range
  • ±10mV Output Voltage Accuracy
  • Optimized for Low Output Voltages Down to 0.5V
  • High Efficiency
  • Integrated Buffer for VTTR = VDDQIN • 0.5
  • Shutdown Current: <1µA
  • Adjustable Switching Frequency: Up to 4MHz
  • Optional Internal Compensation
  • Internal Soft-Start
  • Power Good Status Output
  • Input Overvoltage Protected
  • Thermally Enhanced 24-Pin 3mm × 5mm QFN Package
Additional Details
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The LTC3617 is a high efficiency monolithic synchronous buck regulator utilizing a current mode, constant frequency architecture. It operates from an input voltage range of 2.25V to 5.5V and provides a regulated output voltage equal to 0.5 • VDDQIN while sourcing and sinking up to 6A of load current. An internal amplifier provides a VTTR output voltage equal to 0.5 • VDDQIN with an output current capability of ±10mA.

The operating frequency is externally programmable up to 4MHz, allowing the use of small surface mount inductors. For switching-noise-sensitive applications, the LTC3617 can be synchronized to an external clock up to 4MHz.

Forced continuous mode operation in the LTC3617 reduces noise and RF interference. Adjustable external compensation allows the transient response to be optimized over a wide range of loads and output capacitors.

The internal synchronous switch increases efficiency and eliminates the need for an external catch diode, minimizing external component count and board space. The LTC3617 is offered in a leadless 24-pin 3mm × 5mm thermally enhanced QFN package.

Applications

  • DDR Termination
  • Supports DDR, DDR2 and DDR3 Standards
  • Tracking Supplies
Part Models 4
1ku List Price Starting From $4.55

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Documentation

Documentation

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
LTC3617EUDD#PBF
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LTC3617EUDD#TRPBF
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LTC3617IUDD#PBF
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LTC3617IUDD#TRPBF
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Software & Part Ecosystem

Software & Part Ecosystem

Evaluation Kit

Evaluation Kits 1

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DC1707A

LTC3617EUDD Demo Board | VIN=2.25V to 5.5V, VOUT1 = 0.5VIN (VTT) @ ±6A, VOUT2 = 0.5VIN (VTTR) @ ±10mA

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DC1707A

LTC3617EUDD Demo Board | VIN=2.25V to 5.5V, VOUT1 = 0.5VIN (VTT) @ ±6A, VOUT2 = 0.5VIN (VTTR) @ ±10mA

LTC3617EUDD Demo Board | VIN=2.25V to 5.5V, VOUT1 = 0.5VIN (VTT) @ ±6A, VOUT2 = 0.5VIN (VTTR) @ ±10mA

Product Detail

Demonstration circuit 1707 is a high efficiency monolithic step-down DC/DC switching regulator designed for double-data-rate (DDR) memory termination in computer systems. The VTT output is capable of sourcing and sinking up to 6A with an output voltage equal to one-half the voltage applied to the VDDQIN terminal or one-half the input supply voltage, selected by a jumper. An additional low current output (VTTR) also equal to one-half the voltage on VDDQIN can source and sink up to 10mA. Input voltage range is from 2.25V to 5.5V with overvoltage protection for transients exceeding 6.5V.


 


Tools & Simulations

Tools & Simulations 1

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.

To launch ready-to-run LTspice demonstration circuits for this part:

Step 1: Download and install LTspice on your computer.

Step 2: Click on the link in the section below to download a demonstration circuit.

Step 3: If LTspice does not automatically open after clicking the link below, you can instead run the simulation by right clicking on the link and selecting “Save Target As.” After saving the file to your computer, start LTspice and open the demonstration circuit by selecting ‘Open’ from the ‘File’ menu.

Reference Designs

Reference Designs 2

Versal HBM Diagram

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xilinx-minimum-rails

xilinx-minimum-rails

Circuits from the lab

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Features and Benefits

  • The Versal HBM series features heterogeneous integration of fast memory, secure connectivity, and adaptive compute to eliminate processing and memory bottlenecks for memory-bound, compute-intensive workloads such as machine learning, database acceleration, next-generation firewalls, and advanced network testers. Analog Devices has worked closely AMD to develop verified power solutions that optimize cost, size and efficiency in high performance applications.
  • ADI provides supporting documentation including LTpowerPlanner and applicable LTpowerPlay configuration files to enable you to validate the power solution for your application seamlessly. For a complete list  power designs and use cases, please contact your local local FAE.
  • ADI has also completed a complete power evaluation report for Mid-High Voltage rails. For a complete report please submit your interest here.

Key power regulators are used for this device as follows:

  • LTC3888-1
  • LTC7051
  • LTC3633A
  • LTC7200S
  • LTC7151S
  • LT8652
  • ADP125
  • LTC3617 (Optional)
  • LTC3618 (Optional)
View Detailed Reference Design external link
Artix US+ Rail Consolidation – Minimum Rails (AU10P/15P) Power Tree

Minimum Rails for AU10/15P and AU20/25P - Non-Hardware Verified Design

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artix-ultrascale

Minimum Rails for AU10/15P and AU20/25P - Non-Hardware Verified Design

artix-ultrascale

Circuits from the lab

tooltip Info:Circuits from the lab
Minimum Rails for AU10/15P and AU20/25P - Non-Hardware Verified Design

Features and Benefits

  • Xilinx Artix® UltraScale+ devices are the industry’s only cost-optimized FPGAs based on an advanced, production-proven 16nm architecture for best-in-class performance/watt.

  • Analog Devices, Inc. supports power delivery solutions for the Artix Ultrascale+ low-cost designs. Monolithic solutions are used to power Xilinx FPGA and/or SoC rails as well as other system rails. These regulators are highly integrated discrete solutions optimized for cost, efficiency and footprint.

  • ADI provides supporting documentation including power schematics, layout, LTpowerPlanner® and applicable LTpowerPlay® configuration files to enable you to validate the power solution for your application seamlessly.

  • For a complete list power designs and use cases, please contact your local FAE.

  • Key Power for full management devices are used as follows:

    • LTC3307A
    • LTC3309A
    • ADP125
    • LTC3617 (Optional DDR)
    • LTC3618
    • ADM1186 (Optional Monitoring & Sequencing)
View Detailed Reference Design external link

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