AD9609

PRODUCTION

10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter

Data Sheet (Rev. C) Product Selection Table
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Overview

  • 1.8 V analog supply operation
  • 1.8 V to 3.3 V output supply
  • SNR
    • 61.5 dBFS at 9.7 MHz input
    • 61.0 dBFS at 200 MHz input
  • SFDR
    • 75 dBc at 9.7 MHz input
    • 73 dBc at 200 MHz input
  • Low power
    • 45 mW at 20 MSPS
    • 76 mW at 80 MSPS
  • Differential input with 700 MHz bandwidth
  • On-chip voltage reference and sample-and-hold circuit
  • 2 V p-p differential analog input
  • DNL = ±0.10 LSB
  • Serial port control options
    • Offset binary, gray code, or twos complement data format
    • Optional clock duty cycle stabilizer
    • Integer 1-to-8 input clock divider
    • Built-in selectable digital test pattern generation
    • Energy-saving power-down modes
    • Data clock out with programmable clock and data alignment

The AD9609 is a monolithic, single channel 1.8 V supply, 10-bit, 20/40/65/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.

The product uses multistage differential pipeline architecture with output error correction logic to provide 10-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.

The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).

A differential clock input with selectable internal 1 to 8 divide ratio controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.

The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported.

The AD9609 is available in a 32-lead RoHS-compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).


APPLICATIONS

  • Communications
  • Diversity radio systems
  • Multimode digital receivers
  • GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
  • Smart antenna systems
  • Battery-powered instruments
  • Handheld scope meters
  • Portable medical imaging
  • Ultrasound
  • Radar/LIDAR
  • PET/SPECT imaging

PRODUCT HIGHLIGHTS

1. The AD9609 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.
2. The sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.
3. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO and data output (D9 to D0) timing and offset adjustments, and voltage reference modes.
4. The AD9609 is packaged in a 32-lead RoHS compliant LFCSP that is pin compatible with the AD9629 12-bit ADC and the AD9649 14-bit ADC, enabling a simple migration path between 10-bit and 14-bit converters sampling from 20 MSPS to 80 MSPS.
AD9609
10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter
AD9609-fbl AD9609 Pin Configuration
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Documentation

Data Sheet 1

User Guide 1

Application Note 8

Technical Articles 2

Evaluation Design File 2

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Software Resources

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Hardware Ecosystem

Parts Product Life Cycle Description
Clock ICs 6
AD9510
RECOMMENDED FOR NEW DESIGNS 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs
AD9511
RECOMMENDED FOR NEW DESIGNS 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs
AD9512
RECOMMENDED FOR NEW DESIGNS 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs
AD9513
RECOMMENDED FOR NEW DESIGNS 800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs
AD9514
RECOMMENDED FOR NEW DESIGNS 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs
AD9515
RECOMMENDED FOR NEW DESIGNS 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs
Differential Amplifiers 4
ADA4937-1
RECOMMENDED FOR NEW DESIGNS Ultralow Distortion Differential ADC Driver (Single)
ADA4938-1
RECOMMENDED FOR NEW DESIGNS Ultralow Distortion Differential ADC Driver (Single)
ADL5561
RECOMMENDED FOR NEW DESIGNS

2.9 GHz Ultralow Distortion RF/IF Differential Amplifier
ADL5562
RECOMMENDED FOR NEW DESIGNS 3.3 GHz Ultralow Distortion RF/IF Differential Amplifier
Variable Gain Amplifiers (VGA) 2
AD8370
PRODUCTION 750 MHz Digitally Controlled Variable Gain Amplifier
AD8375
PRODUCTION Ultralow Distortion IF VGA
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Tools & Simulations

Virtual Eval - BETA

Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.

Open Tool

AD9609 Simulink ADIsimADC Model

Open Tool

AD9609 IBIS Model 1

Visual Analog

For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.

Open Tool

S-Parameter 1

Evaluation Kits

eval board
schematic 1
HSC-ADC-EVALCZ

FPGA-Based Data Capture Kit

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Features and Benefits

  • 64kB FIFO Depth
  • Works with single and multi-channel ADCs
  • Use with VisualAnalog® software
  • Based on Virtex-4 FPGA
  • May require adaptor to interface with some ADC eval boards
  • Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
  • DDR Encode Rates on each channel

Product Details

The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.

eval board
schematic 2
schematic 3
schematic 4
EVAL-AD9609

AD9609 Evaluation Board

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Product Details

This page contains evaluation board documentation and ordering information for evaluating the AD9609.

The AD9609-80EBZ is an evaluation board for the AD9609, single 10-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations, It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device’s hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9609.

The AD9609 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeed.converters@analog.com.
HSC-ADC-EVALCZ
FPGA-Based Data Capture Kit
High_Speed_ADC_evalboard_05
EVAL-AD9609
AD9609 Evaluation Board
AD9609 Evaluation Board AD9609 Evaluation Board - Top View AD9609 Evaluation Board - Bottom View

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