Features and Benefits
- Lowpower : 141 mW per channel, TGC mode, 40 MSPS;
60 mW per channel, CW mode
- 10 mm × 10 mm, 144-ball CSP-BGA
- TGC channel input-referred noise: 0.8 nV/√Hz, max gain
- Flexible power-down modes
- Fast recovery from low power standby mode: <2us
- Overload recovery: <10 ns
- Input-referred noise: 0.75 nV/√Hz , gain = 21.3 dB
- Programmable gain: 15.6 dB/17.9 dB/21.3 dB
- 0.1 dB compression: 1000 mV p-p/750 mV p-p/450 mV p-p
- Dual-mode active input impedance matching
- Bandwidth (BW) > 100 MHz
- Attenuator range: −45 dB to 0 dB
- Postamp gain (PGA): 21 dB/24 dB/27 dB/30 dB
- Linear-in-dB gain control
- Programmable second-order LPF from 8 MHz to 18 MHz
- Programmable HPF
- SNR: 70 dB, 12 bits up to 80 MSPS
- Serial LVDS (ANSI-644, Low power/reduced signal)
- Individual programmable phase rotation
- Output dynamic range per channel: >160 dBc/√Hz
- Output-referred SNR: 155 dBc/√Hz, 1kHz offset, -3dBFS
The AD9279 is designed for low cost, low power, small size, and ease of use for medical ultrasound and automotive radar. It contains eight channels of a variable gain amplifier (VGA) with a low noise preamplifier (LNA), an antialiasing filter (AAF), an analog-to-digital converter (ADC), and an I/Q demodulator with programmable phase rotation.
Each channel features a variable gain range of 45 dB, a fully differential signal path, an active input preamplifier termination, and a maximum gain of up to 52 dB. The channel is optimized for high dynamic performance and low power in applications where a small package size is critical.
The LNA has a single-ended-to-differential gain that is selectable through the SPI. Assuming a 15 MHz noise bandwidth (NBW) and a 21.3 dB LNA gain, the LNA input SNR is roughly 94 dB. In CW Doppler mode, each LNA output drives an I/Q demod-ulator that has independently programmable phase rotation with 16 phase settings.
Power-down of individual channels is supported to increase battery life for portable applications. Standby mode allows quick power-up for power cycling. In CW Doppler operation, the VGA, AAF, and ADC are powered down. The ADC contains several features designed to maximize flexibility and minimize system cost, such as a programmable clock, data alignment, and programmable digital test pattern generation. The digital test patterns include built-in fixed patterns, built-in pseudo random patterns, and custom user-defined test patterns entered via the serial port interface.
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (2)
This page contains ordering information for evaluating the AD9279.
The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.
Features & Benefits
- 64kB FIFO Depth
- Works with single and multi-channel ADCs
- Use with VisualAnalog® software
- Based on Virtex-4 FPGA
- May require adaptor to interface with some ADC eval boards
- Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
- DDR Encode Rates on each channel
Documentation & Resources
Software & Systems Requirements
Tools & Simulations
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
AD9279 Companion Parts
Recommended Clock Drivers
- For low jitter, low power, clock fanout buffers: ADCLK846, ADCLK946.
- For low jitter performance: AD9510, AD9511, AD9512, AD9513, AD9514, AD9515.
Recommended A/D Converter
- For sampling the I and Q signals in analog beamforming applications: AD7982.
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
See our Ordering FAQs for answers to questions about online orders, payment options and more.
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.