Features and Benefits

  • Alias free: inherent antialias rejection of 102.5 dB typical in high performance mode
  • Excellent ac and dc performance
    • 108 dB dynamic range at ODR = 374 kSPS, FIR filter, typical
    • 137 dB dynamic range at ODR = 10 SPS, sinc3 filter, typical
    • THD: −120 dB typical with 1 kHz input tone
    • Offset error drift: 0.7 µV/°C typical
    • Gain drift: 2 ppm/°C typical
    • INL: ±2 ppm of FSR typical
  • Dynamic range enhancement: 4:1 and 2:1 averaging mode
    • 126 dB, A weighted dynamic range
  • Resistive ADC and reference input
  • Easy to sync: asynchronous sample rate converter
    • Multidevice synchronization with one signal line
    • Programmable data rates from 0.01 kSPS to 1496 kSPS with resolution of 0.01 SPS
    • Option to control output data rate by external signal
  • Linear phase digital filter options
    • Low ripple FIR filter: 32 µdB pass-band ripple, dc to 161.942 kHz
    • Low latency sinc3 filter and sinc6 filter, dc to 391.5 kHz
    • Sinc3 filter with 50 Hz/60 Hz rejection
  • Crosstalk: 130.7 dBFS
  • Daisy-chaining
  • CRC error checking on data and SPI interface
  • Two power modes: high performance mode and low power mode
  • Power supply: 4.5 V to 5.5 V and 1.65 V to 1.95V
  • 1.8 V IOVDD level
  • External reference: 4.096 V or 5V
  • Crystal or external CMOS clock of 48 MHz
  • SPI or pin (standalone) configurable operation
  • Operating temperature range: 0°C to 85°C
  • Available in 8 mm × 8 mm, 56-lead LFCSP with exposed pad

Product Details

The AD7134 is a quad channel, low noise, simultaneous sampling, precision analog-to-digital converter (ADC) that delivers on functionality, performance, and ease of use.

Based on the continuous time sigma-delta (CTSD) modulation scheme, the AD7134 removes the traditionally required switched capacitor circuitry sampling preceding the Σ-Δ modulator, which leads to a relaxation of the ADC input driving requirement. The CTSD architecture also inherently rejects signals around the ADC aliasing frequency band, giving the device its inherent antialiasing capability, and removes the need for a complex external antialiasing filter.

The AD7134 has four independent converter channels in parallel, each with a CTSD modulator and a digital decimation and filtering path. The AD7134 enables simultaneous sampling of four separate signal sources, each supporting a maximum input bandwidth of 391.5 kHz and achieving tight phase matching between these four signal measurements. The high level of channel integration, together with its simplified analog front-end requirement, enables the AD7134 to provide a high density multichannel data acquisition solution in a small form factor.

The signal chain simplification property of the AD7134 also improves the system level performance through the reduction of noise, error, mismatch, and distortion that is normally introduced by the analog front-end circuitry.

The AD7134 offers excellent dc and ac performance. The bandwidth of each ADC channel ranges from dc to 391.5 kHz, making the device an ideal candidate for universal precision data acquisition solutions supporting a breadth of sensor types, from temperature and pressure to vibration and shock.

The AD7134 offers a large number of features and configuration options, giving the user the flexibility to achieve the optimal balance between bandwidth, noise, accuracy, and power for a given application.

An integrated asynchronous sample rate converter (ASRC) allows the AD7134 to precisely control the decimation ratio and, in turn, the output data rate (ODR) using interpolation and resampling techniques. The AD7134 supports a wide range of ODR frequencies, from 0.01 kSPS to 1496 kSPS with less than 0.01 SPS adjustment resolution, allowing the user to granularly vary sampling speed to achieve coherent sampling. The ODR value can be controlled through the ODR_VAL_INT_x and ODR_VAL_FLT_x registers (Register 0x16 to Register 0x1C, ASRC master mode), or using an external clock source (ASRC slave mode). The ASRC slave mode operation enables synchronous sampling between multiple AD7134 devices to a single system clock. The ASRC simplifies the clock distribution requirement within a medium bandwidth data acquisition system because it no longer requires a high frequency, low jitter master clock from the digital back end to be routed to each ADC.

The ASRC acts as a digital filter and decimates the oversampled data from the Σ-Δ modulator to a lower rate to favor higher precision. The ADC data is then further processed by one of the AD7134 user-selectable digital filter profiles to further reject the out of band signals and noises, and reduce the data rate to the final desired ODR value.

The AD7134 offers three main digital filter profile options: a wideband low ripple filter with a brick wall frequency profile and an ODR range from 2.5 kSPS to 374 kSPS that is suitable for frequency domain analysis, a fast responding sinc3 filter with an ODR range from 0.01 kSPS to 1496 kSPS that is suitable for low latency time domain analysis and low frequency high dynamic range input types, and a balanced sinc6 filter with an ODR range from 2.5 kSPS to 1.496 MSPS, offering optimal noise performance and response time.

The AD7134 is also capable of performing on-board averaging between two or four of its input channels. The result is a near 3 dB, if two channels are combined, or 6 dB, if all four channels are combined, improvement in dynamic range while maintaining the bandwidth.

The AD7134 supports two device configuration schemes: serial peripheral interface (SPI) and hardware pin configuration (pin control mode). The SPI control mode offers access to all the features and configuration options available on the AD7134. SPI control mode also enables access to the on-board diagnostic features designed to enable a robust system design. Pin control mode offers the benefit of simplifying the device configuration, enabling the device to operate autonomously after power-up operating in a standalone mode.

In addition to the optional SPI, the AD7134 has a flexible and independent data interface for transmitting the ADC output data. The data interface can act as either a bus master or a slave with various clocking options to support multiple communication bus protocols. The data interface also supports daisy-chaining and an optional minimum input/output (I/O) mode designed to minimize the number of digital isolator channels required in isolated applications.

The AD7134 has an operating ambient temperature range from 0°C to 85°C. The device is housed in an 8 mm × 8 mm, 56-lead lead frame chip scale package (LFCSP).

Note that throughout this data sheet, multifunction pins, such as FORMAT1/SCLK, are referred to either by the entire pin name or by a single function of the pin, for example, SCLK, when only that function is relevant.


  • Electrical test and measurement
  • Audio test
  • 3-phase power quality analysis
  • Control and hardware in loop verification
  • Sonars
  • Condition monitoring for predictive maintenance
  • Acoustic and material science research and development

Product Lifecycle icon-recommended Recommended for New Designs

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.