- 30 mA吸电流能力
- 1000 kHz工作频率
- 电源电压/逻辑电平：3.0 V至5.5 V
- 1分钟2500 V rms，符合UL 1577标准
- DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
- VIORM = 560 V 峰值
- 多级I2C 接口
The EVAL-ADuM1250EBZ supports two bidirectional channels for evaluation of isolated I2C interfaces in 8-lead SOIC packages. The evaluation board provides a JEDEC standard, 8-lead SOIC_N pad layout. This layout supports signal distribution, loopback, and loads referenced to the VDDx or GNDx planes, as well as optimal bypass capacitance. Signal sources can be conducted to the board through header pins or through edge mounted Sub- miniature Version A (SMA) connectors (SMA connectors must be ordered separately).
Screw terminal blocks on the evaluation board provide power connections. The board includes 200 mil (5.08 mm) header positions for compatibility with active probes (probe header pins must be ordered separately). The EVAL-ADuM1250EBZ evaluation board can be used to evaluate the ADuM1250, ADuM1251, ADuM2250, and ADuM2251 devices. Although the pad layout on the EVAL- ADuM1250EBZ does not support the ADuM2250 and ADuM2251 16-lead SOIC_W and SOIC_IC packages, these devices are functionally equivalent to the ADuM1250 and ADuM1251, respectively, for the purposes of evaluation. They differ only by package and isolation capabilities. Therefore, evaluations of the ADuM1250 and ADuM1251 can be applied to the ADuM2250 and ADuM2251 as well.
The evaluation board follows best printed circuit board (PCB) design practices for 4-layer boards, including a full power and ground plane on each side of the isolation barrier. No other electromagnetic interference (EMI) or noise mitigation design features are included on this evaluation board. For high speed operation, or when ultralow emissions are required, refer to the AN-1109 Application Note for additional evaluation board layout techniques.
Full specifications for the ADuM1250 are available in the ADuM1250 data sheet, which must be consulted in conjunction with User Guide UG-1100 when working with the evaluation board.