ADL8102

ADL8102-EVALZ是一块2层印刷电路板(PCB)，由10 mil厚的Rogers 4350B和铜箔制成。

ADL8102-EVALZ上的RFIN和RFOUT端口配有2.9 mm插口同轴连接器，相应的RF走线具有50 Ω特征阻抗。ADL8102-EVALZ上装配的组件适合在−40°C至+85°C整个工作温度范围内使用。

为校准电路板的走线损耗，在J1和J2连接器之间提供了一个直通校准路径THRUCAL。J1和J2必须安装RF连接器才能使用该直通校准路径。有关直通校准路径性能的信息，请参阅用户指南中的表1和图3。

通过表贴技术(SMT)测试点连接器GND和VDD访问ADL8102-EVALZ接地路径和VDD引脚。可通过RBIAS引脚轻松访问VBIAS的辅助测试点（有关测试点位置，请参见用户指南中的图5）。

ADL8102-EVALZ上的RF走线为50 Ω、接地共面波导走线。封装接地引线和裸露焊盘直接连接到接地平面。多个导通孔用于连接顶部和底部接地平面，并特别集中在接地焊盘正下方的区域，以便提供充分的导电性和导热性。

ADL8102-EVALZ上的电源去耦电容代表用于表征和评定器件的配置。

有关ADL8102的完整规格，请参考ADI公司的ADL8102数据手册。使用ADL8102-EVALZ评估板时，必须同时参阅数据手册和用户指南。

• Multi-Channel, Wideband System Development Platform Using Apollo (AD9084)
• Mates With Xilinx VCU118 Evaluation Board (Not Included)
• 16x RF Receive (Rx) Channels
• Total 16x 8GSPS to 20GSPS ADC
• Digital Down Converters (DDCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
• Programmable Finite Impulse Response Filters (pFIRs)
• Complex Finite Impulse Response Filters (CFIRs)
• 16x RF Transmit (Tx) Channels
• Total 16x 8GSPS to 28GSPS DAC
• Digital Up Converters (DUCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
• Programmable Finite Impulse Response Filters (pFIRs)
• Complex Finite Impulse Response Filters (CFIRs)
• Flexible Rx & Tx RF Front-Ends
• Rx: Filtering, Amplification, Digital Step Attenuation for Gain Control
• Tx: Filtering, Amplification
• Flexible Clock Distribution
• On-Board Clock Distribution from Single External 400MHz Reference
• Support for External Converter Clock per AD9084 via solder rework
• On-Board Power Regulation from Single 12V Power Adapter (Included)

• Mates to ADXBAND16EBZ Digitizing Card & VCU118 PMOD Interface (Cable Included)
• Provides Both Individual Adjacent Channel Loopback and Combined Channel Loopback Options
• Combined Tx Channels Out Option
• Combined Rx Channels In Option

Easy Control Tools and Platform Interfaces to Simplify Software Framework Developments:

• IIO Oscilloscope GUI
• MATLAB Add-Ons & Example Scripts
• Example HDL Builds including JESD204C Bring-Up
• Embedded Software Solutions for Linux and Device Drivers

• Multi-Chip Synchronization for Power-Up Phase Determinism
• System-Level Amplitude/Phase Alignment Using NCOs
• Low-Latency ADC-to-DAC Loopback Bypassing JESD Interface
• pFIR Control for Broadband Channel-to-Channel Amplitude/Phase Alignment
• Fast-Frequency Hopping

The ADXBAND16EBZ contains four AD9084 mixed‑signal front‑end devices, including the RF front end, clocking, and power circuitry. The ADXBAND16EBZ serves as a complete system solution targeting common applications such as phased‑array radars, wideband systems, and ground‑based SATCOM. Its primary target application is a 16‑Tx/16‑Rx direct X‑band sampling phased array.

The platform is intended as a testbed for demonstrating multi‑chip synchronization, as well as implementing system‑level calibrations, beamforming algorithms, and other signal‑processing techniques. The system is designed to interface with the VCU118 Evaluation Board from Xilinx^®, which features the Virtex^® UltraScale+™ XCVU9P FPGA, along with provided reference software, HDL code, and MATLAB system‑level interfaces.

A 16‑Tx/16‑Rx Calibration Board can be used to develop system‑level calibration algorithms, including demonstrations of power‑up phase determinism. The Calibration Board provides improvements in combined‑channel dynamic range, spurious performance, and phase noise, and can be controlled via a MATLAB add‑on when connected to the PMOD interface of the VCU118.