最新情報 (3)
製品概要
機能と利点
SHARC+ Core Infrastructure
- 800 MHz (max) or 1 GHz (max) Core clock frequency
- 2x 640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance
- 32-bit, 40-bit & 64-bit floating point support
- 32-bit fixed point
- Byte, short-word, word, long-word addressed
- 1 GHz Arm Cortex-A5 (with Neon/FPU)
- 32 kByte/32 kByte L1 Instr./Data Cache
- 256 kByte L2 Cache
- 2048 KB on-chip Level 2 (L2) SRAM with ECC protection - eliminates need for external memory in many use cases
- Level 3 (L3) interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.35 V capable DDR3L devices)
- 1.35V support for DDR3L
Advanced Hardware Accelerators
- Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power
- Security Crypto Engines with OTP
Innovative Digital Audio Interface (DAI) includes:
- 8x Full SPORT interfaces w/TDM & I2S modes
- 2x S/PDIF Rx/Tx, 8 ASRC pairs
- 8x Precision Clock Generators
- 2x 4-channel PDM Mic Inputs
- 40 Buffers
- 2x Quad SPI, 1x Octal SPI
- MLB 3-pin / 6-pin
- 6x I2C,3x UARTs
- 2x Link Ports
- 16x General Purpose Timer, 1x General Purpose Counter
- 3x Watchdog Timers
- ePPI
- USB 2.0 HS OTG Controller
- 10/100 EMAC
- 10/100/1000 EMAC w/AVB and 1588
- 2x CAN FD
- 8-ch 12bit Housekeeping ADC
- 135 GPIO pins, 40 DAI pins
- Thermal Sensor
- 17mm x 17mm (0.8mm pitch) 400-ball FCBGA
- Security and Protection
- Crypto hardware accelerators
- Fast secure boot with IP protection
- Enhanced FIR and IIR accelerators running up to 1 GHz
- AEC-Q100 qualified for automotive applications
製品概要
Reaching speeds of up to 1 GHz, the ADSP-SC59x processors are members of the SHARC® family of products. The ADSP-SC59x processor is a dual-SHARC+® core DSP that doubles the audio performance of its single-SHARC+ core ADSP-2156x predecessor and adds an integrated Arm Cortex-A5 core, also running at up to 1 GHz. The A5 processor, with FPU and Neon® DSP extensions, handles additional real-time processing tasks and manages peripherals used to interface to time-critical data in audio applications. These interfaces include Gigabit Ethernet, USB High-Speed, CAN FD, and a rich variety of other connectivity options for a flexible and simplified system design.
The ADSP-SC59x SHARC processors are members of the SIMD SHARC family of digital signal processors (DSPs) that feature Analog Devices, Inc., Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.
By integrating a rich set of industry-leading system peripherals and memory (see Table 1 in the data sheet), the SHARC+ processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.
APPLICATIONS
- Automotive:
- audio amplifier, head unit, ANC/RNC, rear seat entertainment, digital cockpit, ADAS
- Consumer & Professional Audio:
- speakers, sound bars, AVRs, conferencing systems, mixing consoles, microphone arrays, headphones
製品ライフサイクル
発売前
新たに発売予定の製品です。技術的な検証が継続中の場合もあります。数量が限られており、設計仕様は量産開始前に変更されることがあります。
評価キット (1)
参考資料
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EE-449: ADSP-21593/21594/ADSP-SC592/SC594 Processor Thermal Guidelines9/15/2023
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EE-448: Safe Power-down Mechanisms for Digital Processors9/5/2023
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EE447: Tips and Tricks Using the ADSP-SC59x/ADSP-2159x/ADSP-2156x Processor BootROM (Rev. 1)6/28/2023
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• EE447 Source Code Examples for Boot Stream Work
ZIP -
EE-436: Using ADSP-SC59x/2159x High Performance FIR/IIR Accelerators (Rev. 2)5/4/2023
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• EE436v02
ZIP -
EE-434: ADSP-2159x/SC59x Board Design Guidelines for Dynamic Memory Controller4/13/2023
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EE-445: ADSP-SC59x SHARC+ Processor System Optimization Techniques1/11/2023
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• EE-445
ZIP -
EE-437: OSPI PHY Configuration and Training (Rev. 1)11/1/2022
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EE-433: Estimating Power for ADSP-2159x/SC59x SHARC+ Processors4/19/2022
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• EE-433: Power Calculator Tool
ZIP -
EE-432: Boot Time Estimation for ADSP-SC59x/ADSP-2159x SHARC+ Processors8/25/2021
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• EE-432: Code Example
ZIP -
EE-430: Migrating from ADSP-2156x to ADSP-SC59x Processors6/28/2021
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ADSP-SC59x/ADSP-2159x Product Family6/1/2021
ソフトウェア & システム
ミドルウェア
Operating Systems and Middleware
Analog Devices, in collaboration with several Alliance partners, provides the following operating system and middleware offerings to enable a user-friendly programming environment for applications developed using the Blackfin® and SHARC® processor families. These real-time kernels and services software seamlessly integrate with CrossCore® Embedded Studio.
ソフトウェア開発ツール
CrossCore® Embedded Studio
CrossCore Embedded Studioは、アナログ・デバイセズのBlackfin®、SHARC®、Arm®の各プロセッサ・ファミリ向けに用意された、世界トップクラスの統合開発環境（IDE）です。
SigmaStudio®+
車載オーディオ、コネクティビティ、アルゴリズム／IPアプリケーション向けのシステム・レベル・ソリューション
CrossCore®ユーティリティ
CrossCoreユーティリティは、Cortex-Mプロセッサを使用するためのいくつかの機能を備えています。これまでこのようなユーティリティはIARおよびKeilツールチェーン向けの様々なボード・サポート・パッケージの中で販売されてきましたが、維持管理の利便性向上のため、本製品に集約されました。
ツールおよびシミュレーション
BSDL Model Files
IBISモデル
IBS
ADSP-SC594/SC592/21594 IBIS Model
632.44 K
サポート ＆ ディスカッション
ADSP-SC594 Discussions
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