ADF4196: Low Phase Noise, Fast Settling, 6 GHz PLL Frequency Synthesizer Data Sheet (Rev. D)10/14/20112801 kB
Features and Benefits
- Fast settling, fractional-N
- Single PLL replaces ping-pong synthesizers
- Frequency hop across GSM band in 5 μs with phase settled within 20 μs
- 1 degree rms phase error at 4 GHz RF output
- Digitally programmable output phase
- RF input range up to 6 GHz
- 3-wire serial interface
- On-chip, low noise differential amplifier
- Phase noise figure of merit: –216 dBc/Hz
The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations, and the fast settling feature makes the ADF4196 suitable for pulse Doppler radar applications.
The ADF4196 consists of a low noise, digital phase frequency detector (PFD) and a precision differential charge pump. A differential amplifier converts the differential charge pump output to a single-ended voltage for the external voltage controlled oscillator (VCO). The sigma-delta (Σ-Δ) based fractional interpolator, working with the N divider, allows programmable modulus fractional-N division. Additionally, the 4-bit reference (R) counter and on-chip frequency doubler allow selectable reference signal (REFIN) frequencies at the PFD input.
A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a VCO. The switching architecture ensures that the PLL settles within the GSM time slot guard period, removing the need for a second PLL and associated isolation switches. This decreases the cost, complexity, PCB area, shielding, and characterization found on previous ping-pong GSM PLL architectures.
- GSM/EDGE base stations
- PHS base stations
- Pulsed Doppler radar
- Instrumentation and test equipment
- Beam-forming/phased array systems
Markets and Technologies
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
This page contains ordering information for the evaluation board used to evaluate the ADF4196 Low Phase Noise, Fast Settling 6 GHz PLL Frequency Synthesizer.
NOTE: An ADF4196 chip needs to be soldered to the EVAL-ADF4193EBZ2 board.
This evaluation board requires an SDP Controller board for connection to the PC. The SDP controller board connects to the PC via USB 2.0. The evaluation board will connect to the SDP controller board. The evaluation board cannot be connected directly to the PC. The evaluation software running on the PC will communicate through the SDP Controller board, to the evaluation board. The SDP Controller board is a separate list item in the ordering guide below (EVAL-SDP-CS1Z). If you have not previously purchased an SDP Controller board, please do so to ensure a full evaluation setup.
Documentation & Resources
AN-873: Lock Detect on the ADF4xxx Family of PLL Synthesizers (Rev. 0)12/6/2006207 kB
UG-476: PLL Software Installation Guide8/10/2015520 kB
UG-536: Evaluating the ADF4193 and ADF4196 Frequency Synthesizers for Phase-Locked Loops3/28/2013443 kB
RF, Microwave, and Millimeter Wave Product Selection Guide7/13/20189M
Tools & Simulations
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
ADF4196 Companion Parts
Recommended Linear Regulators
- For high accuracy, 5V applications: ADP3334.
- For a step up, 3V to 5V regulator: ADP1613.
- For ultralow noise, 3V applications,150 mA output: ADP150.
- For ultalow noise, 3V applications, 200 mA output: ADP151.
Recommended Divide-by-4 Prescaler
- For a low noise, low power, fixed RF block: ADF5001.
Recommended PLL Active Filter
- For an ultralow noise, rail-to-rail amplifier: OP184.
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
|Part Number||Material Declaration||Reliability Data||Pin/Package Drawing||CAD Symbols, Footprints & 3D Models|
|ADF4196BCPZ||Material Declaration||Reliability Data||32-Lead LFCSP (5mm x 5mm w/ EP)|
|ADF4196BCPZ-RL7||Material Declaration||Reliability Data||32-Lead LFCSP (5mm x 5mm w/ EP)|
|Wafer Fabrication Data|
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