Overview
Features and Benefits
- Radio frequency (RF) 2 × 2 transceiver with integrated 12-bit DACs and ADCs
- Wide bandwidth: 325 MHz to 3.8 GHz
- Supports time division duplex (TDD) and frequency division duplex (FDD) operation
- Tunable channel bandwidth (BW): up to 20 MHz
- Receivers: 6 differential or 12 single-ended inputs
- Superior receiver sensitivity with a noise figure: 3 dB
- Receive (Rx) gain control
- Real-time monitor and control signals for manual gain
- Independent automatic gain control (AGC)
- Dual transmitters: 4 differential outputs
- Highly linear broadband transmitter
- Transmit (Tx) error vector magnitude (EVM): −34 dB
- Tx noise: ≤−157 dBm/Hz noise floor
- Tx monitor: 66 dB dynamic range with 1 dB accuracy
- Integrated fractional N synthesizers
- 2.4 Hz local oscillator (LO) step size
- CMOS/LVDS digital interface
Product Details
The AD9363 is a high performance, highly integrated RF agile transceiver designed for use in 3G and 4G femtocell applications. Its programmability and wideband capability make it ideal for a broad range of transceiver applications. The device combines an RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor. The AD9363 operates in the 325 MHz to 3.8 GHz range, covering most licensed and unlicensed bands. Channel bandwidths from less than 200 kHz to 20 MHz are supported.
The two independent direct conversion receivers have state-of-the-art noise figure and linearity. Each Rx subsystem includes independent automatic gain control (AGC), dc offset correction, quadrature correction, and digital filtering, thereby eliminating the need for these functions in the digital baseband. The AD9363 also has flexible manual gain modes that can be externally controlled. Two high dynamic range ADCs per channel digitize the received I and Q signals and pass them through configurable decimation filters and 128-tap finite impulse response (FIR) filters to produce a 12-bit output signal at the appropriate sample rate.
The transmitters use a direct conversion architecture that achieves high modulation accuracy with ultralow noise. This transmitter design produces a best-in-class Tx EVM of −34 dB, allowing significant system margin for the external power amplifier (PA) selection. The on-board Tx power monitor can be used as a power detector, enabling highly accurate Tx power measurements.
The fully integrated phase-locked loops (PLLs) provide low power fractional N frequency synthesis for all receive and transmit channels. Channel isolation, demanded by FDD systems, is integrated into the design. All voltage controlled oscillators (VCOs) and loop filter components are integrated. The core of the AD9363 can be powered directly from a 1.3 V regulator. The IC is controlled via a standard 4-wire serial port and four real-time I/O control pins. Comprehensive power-down modes are included to minimize power consumption during normal use. The AD9363 is packaged in a 10 mm × 10 mm, 144-ball chip scale package ball grid array (CSP_BGA).
Applications
- 3G enterprise femtocell base stations
- 4G femtocell base stations
- Wireless video transmission
Download the complete design file resource package including user guides.
The ADRV9363-W/PCBZ evaluation board will be available in June 2017. In the meantime you can use the AD-FMCOMMS3 for evaluation. The ADRV9363 will be in the same form factor and use the same FMC interface as AD-FMCOMMS3. It will be supported by the same carrier platforms and same software and tools. Limited by the functionality of AD9363, the ADRV9363 only supports 325MHz to 3.8GHz tuning range and up to 20MHz channel bandwidth. In addition, the ADRV9363 will use an on-board oscillator for external reference clock and it doesn’t offer EXT_LO test point.
Product Lifecycle
Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
Documentation & Resources
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ADI SDR Transceivers Enable Amateur Space Communication1/1/2020 Analog Dialogue
Tools & Simulations
Design Tool
This site contains the device documentation packages for the SDR Integrated Transceivers including user guides, IBIS models, and PCB files.
Product Recommendations
AD9363 Companion Parts
Recommended Voltage Regulators
- For high performance LDO regulators: ADP1755, ADP5040.
- For a high efficiency, step down, dc-to-dc regulator: ADP2164.
Recommended Clock Driver
- For a Quad/Octal network clock driver: AD9548.
Recommended Low Noise Amplifiers (LNA's)
Recommended PLL's
- For a versatile, wideband PLL with integrated VCO: ADF4351.
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
---|---|---|---|---|
AD9363ABCZ | Material Declaration | Reliability Data | 144-Ball CSPBGA (10mm x 10mm x 1.7mm) | |
AD9363ABCZ-REEL | Material Declaration | Reliability Data | 144-Ball CSPBGA (10mm x 10mm x 1.7mm) | |
Wafer Fabrication Data |
Support & Discussions
AD9363 Discussions
Sample & Buy
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Evaluation Boards
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.