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AD6645: 14-Bit, 80 MSPS/105 MSPS A/D Converter Data Sheet (Rev. E)2/2/2002PDF972K
Overview
Features and Benefits
- SNR = 75 dB, fIN 15 MHz, up to 105 MSPS
- SNR = 72 dB, fIN 200 MHz, up to 105 MSPS
- SFDR = 89 dBc, fIN 70 MHz, up to 105 MSPS
- 100 dBFS multitone SFDR
- IF sampling to 200 MHz
- Sampling jitter: 0.1 ps
- 1.5 W power dissipation
- Differential analog inputs
- Pin compatible to AD6644
- Twos complement digital output format
- 3.3 V CMOS compatible
- Data-ready for output latching
Product Details
The AD6645 is a high speed, high performance, monolithic 14-bit analog-to-digital converter (ADC). All necessary functions, including track-and-hold (T/H) and reference, are included on the chip to provide a complete conversion solution. The AD6645 provides CMOS-compatible digital outputs. It is the fourth generation in a wideband ADC family, preceded by the AD9042 (12-bit, 41 MSPS), the AD6640 (12-bit, 65 MSPS, IF sampling), and the AD6644 (14-bit, 40 MSPS/65 MSPS).
Designed for multichannel, multimode receivers, the AD6645 is part of the Analog Devices, Inc., SoftCell® transceiver chipset. The AD6645 maintains 100 dB multitone, spurious-free dynamic range (SFDR) through the second Nyquist band. This breakthrough performance eases the burden placed on multimode digital receivers (software radios) that are typically limited by the ADC. Noise performance is exceptional; typical signal-to-noise ratio (SNR) is 74.5 dB through the first Nyquist band.
The AD6645 is built on the Analog Devices extra fast complementary bipolar (XFCB) process and uses an innovative, multipass circuit architecture. Units are available in a 52-lead exposed pad (TQFP_EP) package specified from −40°C to +85°C at 80 MSPS and −10°C to +85°C at 105 MSPS.
Product Highlights
- IF Sampling. The AD6645 maintains outstanding ac performance up to input frequencies of 200 MHz, suitable for multicarrier 3G wideband cellular IF sampling receivers.
- Pin Compatibility. The ADC has the same footprint and pin layout as the AD6644 14-bit, 40 MSPS/65 MSPS ADC.
- SFDR Performance and Oversampling. Multitone SFDR performance of 100 dBFS can reduce the requirements of high end RF components.
Applications
- Multichannel, multimode receivers
- Base station infrastructures
- AMPS, IS-136, CDMA, GSM, W-CDMA
- Single channel digital receivers
- Antenna array processing
- Communications instrumentation
- Radars, infrared imaging
- Instrumentation
Product Categories
Markets and Technologies
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (1)
Documentation & Resources
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AN-905: VisualAnalog™ Converter Evaluation Tool Version 1.0 User Manual8/18/2020
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AN-1576: Low Jitter Sampling Clock Generator for High Performance ADCs Using the AD9958 500 MSPS DDS or the AD9858 1 GSPS DDS and the AD9515 Clock Distribution IC (Rev. A)9/4/2018PDF148 K
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AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)5/12/2015PDF985 kB
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AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)2/14/2015PDF227 K
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AN-282: Fundamentals of Sampled Data Systems2/14/2015PDF2131 kB
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AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)2/14/2015PDF291K
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AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)2/14/2015PDF363 kB
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AN-345: Grounding for Low-and-High-Frequency Circuits2/14/2015PDF455 kB
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AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)2/14/2015PDF207 kB
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AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)2/2/2012PDF392 kB
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AN-737: How ADIsimADC Models an ADC (Rev. B)11/9/2007PDF373 kB
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AN-807: Multicarrier WCDMA Feasibility (Rev. 0)11/9/2007PDF969 kB
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AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)11/9/2007PDF1535 kB
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AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)12/14/2004PDF370K
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AN-741: Little Known Characteristics of Phase Noise (Rev. 0)11/29/2004PDF1679 kB
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Ball Aerospace Case Study2/14/2015
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Military Products by GENERIC Part Number1/22/2009PDF16 kB
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Military Part Cross-Reference Guide1/22/2009PDF29 kB
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Military Products by Function1/22/2009PDF7 kB
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Maximizing the Dynamic Range of Software-Defined Radio11/1/2014
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Designing Power Supplies for High Speed ADC2/1/2012
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Analog-to-Digital Converter Clock Optimization: A Test Engineering Perspective2/1/2008 Analog Dialogue
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Converters for 3G are Optimized for Cost, Size and Power4/6/2006
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ADC Input Noise: The Good, The Bad, and The Ugly. Is No Noise Good Noise?2/1/2006 Analog Dialogue
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Pushing the State of the Art with Multichannel A/D Converters5/1/2005 Analog Dialogue
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Cascaded Transformers Achieve Better Frequency Performance in High-Speed ADC4/1/2005
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Transformer-Coupled Front-End for Wideband A/D Converters4/1/2005 Analog Dialogue
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Buffer Adapts Single-ended Signals for Differential Inputs2/1/2004
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Advanced Digital Post-Processing Techniques Enhance Performance in Time-Interleaved ADC Systems8/1/2003 Analog Dialogue
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Correlating High-Speed ADC Performance to Multicarrier 3G Requirements6/1/2003
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DNL and Some of its Effects on Converter Performance6/1/2001
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MathWorks®
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| Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
|---|---|---|---|---|
| AD6645ASVZ-105 | Material Declaration | Reliability Data | 52-Lead TQFP (10mm x 10mm w/ EP) | |
| AD6645ASVZ-80 | Material Declaration | Reliability Data | 52-Lead TQFP (10mm x 10mm w/ EP) | |
| Wafer Fabrication Data |
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