ADF4382

RECOMMENDED FOR NEW DESIGNS

Microwave Wideband Synthesizer with Integrated VCO

Data Sheet (Rev. 0) Product Selection Table
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Overview

  • Output frequency range: 687.5 MHz to 22 GHz
  • Integrated RMS jitter at 20 GHz = 20 fs (integration bandwidth: 100 Hz to 100 MHz)
  • Integrated RMS jitter at 20 GHz = 31 fs (ADC SNR method)
  • VCO fast calibration time < 1 μs
  • VCO autocalibration time < 100μs
  • Phase noise floor: −156 dBc/Hz at 20 GHz
  • PLL Specifications:
    • -239 dBc/Hz: Normalized In-Band Phase Noise Floor
    • -287 dBc/Hz: Normalized In-Band 1/f Noise
    • 625 MHz maximum phase/frequency detector input frequency
    • 4.5 GHz reference input frequency
    • Typical spurious fPFD: −90 dBc
  • Reference to output delay specifications
    • Propagation delay temperature coefficient: 0.06 ps/°C
    • Adjustment step size: <1 ps
  • Multichip output phase alignment
  • 3.3 V and 5 V power supplies
  • ADIsimPLL™ loop filter design tool support
  • 7 mm × 7 mm, 48-terminal LGA
  • −40°C to +105°C operating temperature

The ADF4382 is a high performance, ultra-low jitter, fractional-N phased-locked loop (PLL) with an integrated voltage controlled oscillator (VCO) ideally suited for local oscillator (LO) generation for 5G applications or data converter clock applications. The high performance PLL has a figure of merit of −239 dBc/Hz, low 1/f noise and high PFD frequency of 625 MHz in integer mode that can achieve ultra-low in-band noise and integrated jitter. The ADF4382 can generate frequencies in a fundamental octave range of 11 GHz to 22 GHz, thereby eliminating the need for subharmonic filters. The output dividers on the ADF4382 allow a complete output frequency range to be generated from 687.5 MHz to 22 GHz.

For multiple data converter clock applications, the ADF4382 automatically aligns its output to the input reference edge by including the output divider in the PLL feedback loop. For applications that require deterministic delay or delay adjustment capability, a programmable reference to output delay with <1 ps resolution is provided. The reference to output delay matching across multiple devices and over temperature allows predictable and precise multichip alignment.

The simplicity of the ADF4382 block diagram eases development time with a simplified serial peripheral interface (SPI) register map, external SYNC input, and repeatable multichip alignment in both integer and fractional mode.

APPLICATIONS

  • High Performance Data Converter Clocking
  • Wireless infrastructure (MC-GSM, 5G, 6G)
  • Test and Measurement

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    ADF4382
    Microwave Wideband Synthesizer with Integrated VCO
    ADF4382 Functional Block Diagram ADF4382 Pin Configuration
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    Documentation

    Data Sheet 1

    User Guide 1

    Application Note 1

    Technical Articles 1

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    Software Resources

    Device Drivers 2

    Hardware Ecosystem

    Parts Product Life Cycle Description
    ADC/DAC Combo Converters 1
    AD9084
    		RECOMMENDED FOR NEW DESIGNS Apollo MxFE Quad, 16-Bit, 28GSPS RF DAC and Quad, 12-Bit, 20 GSPS RF ADC
    Clock ICs 2
    HMC7044B
    		RECOMMENDED FOR NEW DESIGNS High Performance, 3.2 GHz, 14-Output Jitter Attenuator with JESD204B and JESD204C Support
    ADF4030
    		RECOMMENDED FOR NEW DESIGNS 10-Channel Precision Synchronizer
    Comparators 1
    LTC6957
    		Low Phase Noise, Dual Output Buffer/Driver/Logic Converter
    LDO Linear Regulators 3
    LT3041
    		RECOMMENDED FOR NEW DESIGNS 20 V, 1 A, Ultra-Low Noise, Ultra-High PSRR Linear Regulator with VIOC Control
    LT3045
    		RECOMMENDED FOR NEW DESIGNS 20V, 500mA, Ultralow Noise, Ultrahigh PSRR Linear Regulator
    LT3042
    		RECOMMENDED FOR NEW DESIGNS 20V, 200mA, Ultralow Noise, Ultrahigh PSRR RF Linear Regulator
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    Tools & Simulations

    ADIsimPLL™

    ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.

    Open Tool

    IBIS Model 1

    LTspice

    LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.

    Evaluation Kits

    eval board
    schematic 1
    schematic 2
    EVAL-ADF4382

    Evaluating the ADF4382 Microwave Wideband Synthesizer with Integrated VCO

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    Features and Benefits

    • Self-contained evaluation board, including the ADF4382 frequency synthesizer with integrated VCO, loop filter, USB interface, onboard reference oscillator, propagation delay calibration paths, and voltage regulators
    • Windows®-based software allows control of synthesizer functions from a PC
    • Externally powered by 6 V

    Product Details

    The EV-ADF4382SD1Z evaluates the performance of the ADF4382 frequency synthesizer with an integrated voltage-controlled oscillator (VCO) for phase-locked loops (PLLs). A photograph of the evaluation board is shown in Figure 1 in user guide. The EV-ADF4382SD1Z contains the ADF4382 frequency synthesizer with an integrated VCO, a USB interface, power supply connectors, on-board reference oscillator, propagation delay calibration paths, and Subminiature Version A (SMA) connectors. The outputs of the EV-ADF4382SD1Z are AC-coupled with 50 Ω transmission lines, making these outputs suitable to drive 50 Ω impedance instruments.

    The EV-ADF4382SD1Z requires an SDP-S controller board, which is not supplied with the evaluation board kit). The SDP-S allows software programming of the EV-ADF4382SD1Z with Analog Devices, Inc., ACE software.

    Full specifications for the ADF4382 frequency synthesizer are available in the ADF4382 data sheet, which must be consulted in conjunction with this user guide when working with the EVADF4382SD1Z.

    ADXBAND16EBZ

    16Tx/16Rx Direct X-Band Sampled Phased-Array/RADAR/SATCOM Development Platform

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    Features and Benefits

    ADXBAND16EBZ Digitizing Card
    • Multi-Channel, Wideband System Development Platform Using Apollo (AD9084)
    • Mates With Xilinx VCU118 Evaluation Board (Not Included)
    • 16x RF Receive (Rx) Channels
      • Total 16x 8GSPS to 20GSPS ADC
      • Digital Down Converters (DDCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
      • Programmable Finite Impulse Response Filters (pFIRs)
      • Complex Finite Impulse Response Filters (CFIRs)
    • 16x RF Transmit (Tx) Channels
      • Total 16x 8GSPS to 28GSPS DAC
      • Digital Up Converters (DUCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
      • Programmable Finite Impulse Response Filters (pFIRs)
      • Complex Finite Impulse Response Filters (CFIRs)
    • Flexible Rx & Tx RF Front-Ends
      • Rx: Filtering, Amplification, Digital Step Attenuation for Gain Control
      • Tx: Filtering, Amplification
    • Flexible Clock Distribution
      • On-Board Clock Distribution from Single External 400MHz Reference
      • Support for External Converter Clock per AD9084 via solder rework
    • On-Board Power Regulation from Single 12V Power Adapter (Included)
    16Tx / 16Rx Calibration Board
    • Mates to ADXBAND16EBZ Digitizing Card & VCU118 PMOD Interface (Cable Included)
    • Provides Both Individual Adjacent Channel Loopback and Combined Channel Loopback Options
    • Combined Tx Channels Out Option
    • Combined Rx Channels In Option
    Software Features and Benefits

    Easy Control Tools and Platform Interfaces to Simplify Software Framework Developments:

    • IIO Oscilloscope GUI
    • MATLAB Add-Ons & Example Scripts
    • Example HDL Builds including JESD204C Bring-Up
    • Embedded Software Solutions for Linux and Device Drivers
    Software Reference Design Examples for ADEF Applications to Reduce Prototyping Time:
    • Multi-Chip Synchronization for Power-Up Phase Determinism
    • System-Level Amplitude/Phase Alignment Using NCOs
    • Low-Latency ADC-to-DAC Loopback Bypassing JESD Interface
    • pFIR Control for Broadband Channel-to-Channel Amplitude/Phase Alignment
    • Fast-Frequency Hopping

    Product Details

    The ADXBAND16EBZ contains four AD9084 mixed‑signal front‑end devices, including the RF front end, clocking, and power circuitry. The ADXBAND16EBZ serves as a complete system solution targeting common applications such as phased‑array radars, wideband systems, and ground‑based SATCOM. Its primary target application is a 16‑Tx/16‑Rx direct X‑band sampling phased array.

    The platform is intended as a testbed for demonstrating multi‑chip synchronization, as well as implementing system‑level calibrations, beamforming algorithms, and other signal‑processing techniques. The system is designed to interface with the VCU118 Evaluation Board from Xilinx®, which features the Virtex® UltraScale+™ XCVU9P FPGA, along with provided reference software, HDL code, and MATLAB system‑level interfaces.

    A 16‑Tx/16‑Rx Calibration Board can be used to develop system‑level calibration algorithms, including demonstrations of power‑up phase determinism. The Calibration Board provides improvements in combined‑channel dynamic range, spurious performance, and phase noise, and can be controlled via a MATLAB add‑on when connected to the PMOD interface of the VCU118.
    EVAL-ADF4382
    Evaluating the ADF4382 Microwave Wideband Synthesizer with Integrated VCO
    EVAL-ADF4382 Board Photo Angle View EVAL-ADF4382 Board Photo Top View
    ADXBAND16EBZ
    16Tx/16Rx Direct X-Band Sampled Phased-Array/RADAR/SATCOM Development Platform

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