AD9088

RECOMMENDED FOR NEW DESIGNS

Apollo MxFE Octal, 16-Bit, 16 GSPS RF DAC and Octal, 12-Bit, 8 GSPS RF ADC

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Overview

  • Reconfigurable mixed signal platform design
  • eight 16-bit RF DACs and eight 12-bit RF ADCs (8T8R)
  • Usable RF analog bandwidth up to 16GHz
  • Fast detect with low latency for fast AGC
  • Spectrum sniffer and monitor
  • Signal monitor for slow AGC
  • Multiple loopback (ADC to DAC)
  • Power amplifier downstream protection circuitry
  • Maximum DAC/ADC sample rate up to 16GSPS/8GSPS
  • Versatile digital features
  • Maximum instantaneous bandwidth of 3.2GHz per channel (6T6R) or 2.7GHz per channel (8T8R)
  • Programmable FIR filters at full ADC and DAC sample rates
  • Configurable fine and coarse DDCs and DUCs
  • Fast frequency hopping with profiles
  • Dynamic configuration through SPI, HSCI, GPIO, or external trigger (TRIG)
  • JESD204B and JESD204C: 20Gbps and 28.21Gbps
  • On-chip temperature monitoring unit
  • Package: 24mm × 26mm, 899-ball BGA_ED with 0.80mm pitch

The mixed signal front-end (Apollo MxFE) is a highly integrated device with a 16-bit, 16GSPS maximum sample rate, RF digital-toanalog converter (DAC) core, and 12-bit, 8GSPS maximum sample rate, RF analog-to-digital converter (ADC) core. The AD9088 supports eight transmitter channels and eight receiver channels. The AD9088 is well suited for applications requiring both wideband ADCs and DACs to process signal(s) having wide instantaneous bandwidth. The device features a 48 lane, 28.21Gbps JESD204C or 20Gbps JESD204B data transceiver port, an on-chip clock multiplier, and a digital signal processing (DSP) capability targeted at either wideband or multiband, direct to RF applications. The AD9088 also features a bypass mode that allows the full bandwidth capability of the ADC and/or DAC cores to bypass the DSP datapaths. The device also features low latency loopback and frequency hopping modes targeted at phased-array radar systems and electronic warfare applications.

The AD9088 is available in a 24mm × 26mm, 899-ball BGA_ED and can operate over a junction temperature range of −40°C to +110°C.

APPLICATIONS

  • Radar and phased-array systems
  • Seeker front end
  • Tactical defense radio infrastructure
  • Electronic warfare and signal intelligence
  • Wireless communications infrastructure
  • Wireless communications test (5G mmWave, 5G C band, backhaul)

AD9088
Apollo MxFE Octal, 16-Bit, 16 GSPS RF DAC and Octal, 12-Bit, 8 GSPS RF ADC
AD9088 Functional Block Diagram AD9088 Pin Configuration AD9088 Chip Illustration
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Documentation

Data Sheet 1

User Guide 2

Application Note 1

Technical Articles 21

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Software Resources

Device Drivers 4

  • AD908x GitHub Linux Driver Source Code
  • HDL Reference Design
  • API Device Drivers 1

    Device Application Programming Interface (API) C code drivers provided as reference code that allows the user to quickly configure the product using high-level function calls. The library acts as an abstraction layer between the application and the hardware. The API is developed in C99 to ensure agnostic processor and operating system integration. Customers can port this application layer code to their embedded systems by integrating their platform-specific code base to the API HAL layer.

    To request this software package, go to the Software Request Form signed in with your MyAnalog account and under “Target Hardware” select “High Speed Data Converters” and choose the desired API product package. In addition, there are two SW packages available specifically for Apollo MxFE™. There is a PyApp/ACE evaluation package and there are FPGA bin files supporting various use cases. You will receive an email notification once the software is provided to you.

  • Linux driver

Hardware Ecosystem

Parts Product Life Cycle Description
LDO Linear Regulators 2
LTM4709 RECOMMENDED FOR NEW DESIGNS Triple 3A, Ultralow Noise, High PSRR, Ultrafast μModule Linear Regulator with Configurable Output Array
LT3094 RECOMMENDED FOR NEW DESIGNS −20V, 500mA, Ultralow Noise, Ultrahigh PSRR Negative Linear Regulator
Power System Management (PSM) & Sequencers 1
LTC2977 RECOMMENDED FOR NEW DESIGNS 8-Channel PMBus Power System Manager Featuring Accurate Output Voltage Measurement
Switching Regulators & Controllers 3
LT8627SP RECOMMENDED FOR NEW DESIGNS 18V/16A Step-Down Silent Switcher 3 with Ultralow Noise Reference
LTM4702 RECOMMENDED FOR NEW DESIGNS 16VIN, 8A Ultralow Noise Silent Switcher 3 μModule Regulator
LTM8074 RECOMMENDED FOR NEW DESIGNS 40VIN, 1.2A Silent Switcher µModule Regulator
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Tools & Simulations

ADIsimPLL™

ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.

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Frequency Folding Tool

This tool illustrates the aliasing effects of an input signal and its harmonics when digitized by an ADC. The user can select single tone or a modulated carrier input signal and can observe aliasing in up to 10 Nyquist zones.

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Coherent Sampling Calculator

Calculate coherent sampling frequency and coherent input frequency

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Data Conversion Calculator

Calculate ENOB, SNR, SINAD, THD.

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SNR/THD/SINAD Calculator

This calculator converts SNR, THD, and SINAD into ENOBs and noise. It also computes one of SNR, THD, or SINAD from the other two.

Open Tool

Clock & Timing Tools

Analog Devices provides design tools that work with our product portfolio to help engineers build critical clock and timing IC solutions for wired and wireless networks.

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AD9088 AMI Model

Design file package for the AD9084 and AD9088.

Open Tool

Thermal Models 1

High Speed Converter Toolbox for MATLAB

Open Tool

S-Parameter 1


Evaluation Kits

eval board
ADS10-V1EBZ

ADS10-V1EBZ Evaluation Board

Features and Benefits

Xilinx Virtex Ultrascale+ XCVU35P-3FSHV2892E FPGA.

  • One (1) FMC+ connector.
  • Twenty (24) 32.75Gbps transceivers supported by one (1) FMC+ connector.
  • On-board HBM DRAM in FPGA.
  • Simple USB 3.0 port interface.

Product Details

When connected to a specified Analog Devices high speed converter evaluation board, the ADS10-V1EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS10-V1EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.

eval board
EVAL-ADMX7103

ADMX7103-EBZ: 6G FR3 Radio Front-End

Features and Benefits

  • FR3 TX and RX RF front end board
  • RF carriers 6GHz to 18GHz
  • Power management and biasing
  • 4GHz iBW (with tunable filter enabled)
  • EVM < −50 dB
  • High dynamic range
  • Programmable using an SPI interface
  • TX P1dB: 27dBm
  • TX LO nulling capability
  • RX noise figure: 3.5dB at 12GHz
  • Tunable filters for spur rejection
  • Calibration using temperature sensors

Product Details

The ADMX7103-EBZ is a 6G, Frequency Range 3 (FR3), radio front end (RFFE) reference design that supports frequencies from 6GHz to18GHz and instantaneous bandwidths up to 4GHz. The FR3 RFFE includes transmit (TX) and receive (RX) modes for signal generation and spectrum analysis applications, respectively. Each TX and RX path has dedicated local oscillator (LO) inputs to support time division duplex (TDD) and frequency-divison duplex (FDD) operation. The design supports both 5G and 6G signal generation and a spectrum analyzer/demodulator. In-phase/quadrature (I/Q) intermediate frequency (IF) ports are provided for TX inputs and RX outputs.

eval board
EVAL-AD9088

Evaluating the AD9088 Apollo MxFE

Features and Benefits

  • Fully functional evaluation board for the AD9088 Apollo mixed-signal front-end RF transceivers (MxFE™)
  • On-board clock management
  • On-board power delivery network
  • PC software for control with Analysis | Control | Evaluate (ACE) Software or the Python Application (pyApp)

Product Details

This user guide describes the evaluation hardware and software used to test the AD9084 and AD9088 (Apollo MxFE™).

The evaluation hardware consists of the AD9084-FMCA-EBZ or AD9088-FMCC-EBZ that connects to the ADS10-V1EBZ FPGA data capture and transmit board.

The evaluation software suite includes the Apollo MxFE evaluation software (a new graphical user interface), ACE (a legacy graphical user interface), PyApp (a Python scripting library), and API example code. These tools allow users to configure the Apollo MxFE evaluation platform in predefined or custom use cases, capture analog‑to‑digital converter (ADC) data samples, and transmit digital‑to‑analog converter (DAC) data samples. Each software tool includes a set of predefined use cases for quick initial bring‑up. ADC and DAC sample data are transferred over JESD204B or JESD204C links between the Apollo MxFE and the field‑programmable gate array (FPGA) on the ADS10‑V1EBZ. Captured ADC data can be viewed in the Apollo MxFE evaluation software, ACE, PyApp, or saved as finite‑length signal vectors for analysis with external tools. DAC transmit signals can be generated within the evaluation software or loaded from a file.

The Apollo MxFE evaluation software and ACE can generate and save new custom use cases. Apollo ACE supports the AD9084 only and will soon be discontinued. The Apollo MxFE evaluation software supports both the AD9084 and the AD9088.

Please see the User Guide for the full description.

ADS10-V1EBZ
ADS10-V1EBZ Evaluation Board
ADS10-V1EBZ - Top View ADS10-V1EBZ - Bottom View ADS10-V1EBZ - Angle View
EVAL-ADMX7103
ADMX7103-EBZ: 6G FR3 Radio Front-End
EVAL-ADMX7103 Evaluation Board Angle View EVAL-ADMX7103 Evaluation Board Top View EVAL-ADMX7103 Evaluation Board Bottom View
EVAL-AD9088
Evaluating the AD9088 Apollo MxFE
AD9088-FMCC-EBZ Evaluation Board Angel View AD9088-FMCC-EBZ Evaluation Board Top View AD9088-FMCC-EBZ Evaluation Board Bottom View

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