How to Maintain Maximum Dynamic Range in Wideband High IP2 Receivers

Abstract

This article focuses on the challenges of driving multioctave RF sampling ADCs. It covers the issues related to second-order and third-order intermodulation, the trade-offs of single-ended and differential drive, and the features and performance of RF driver amps that make them ideal choices for use as ADC drivers.

Introduction

With the introduction of the AD9084 and AD9088 RF sampling ADCs and DACs from Analog Devices, direct sampling and digitizing of multioctave frequency bands such as the 2 GHz to 18 GHz electronic warfare (EW) band is becoming a reality. However, these advancements present challenges for the RF circuitry of wideband ADCs and DACs. While traditional narrowband receiver performance metrics focus on third-order intermodulation distortion (IP3), multioctave receivers must contend with in-band second harmonics, third harmonics, and second-order intermodulation products must be reckoned with.

Why Harmonics Pose a Problem for Wideband Receivers

In wideband signal chains, the goal for high performance systems is to digitize the most spectrum with high fidelity and minimal noise. When pushing on all edges of performance—speed, power, sensitivity, and accuracy—there are trade-offs to be made. One such trade-off is the suppression of harmonic and intermodulation content at the cost of degraded system performance and sensing capabilities. While some harmonics and intermodulation products can be filtered, it becomes impossible to filter in-band harmonic content as operating bandwidths widen.

In the past decades, suboctave preselect filters were used as a partial solution to address second-order intermodulation and harmonics that can occur in the presence of interferer signals. These tones pose hazards for receivers, especially those using nonlinear components—such as mixers and amplifiers—to downconvert spectrum to lower sample rate data converters. Additionally, harmonic modulation can generate in-band tones that mask primary sensing targets, leading to challenges in discriminating false targets and protecting against spoofing attacks.

Consider the sensitivity of a given signal chain feeding a digitizer: Ideally, a receiver propagates a single distinct tone and allows the processor to make decisions based on clean data. However, in reality, multiple tones of varying strength are often present and interact, generating additional tones due to nonlinearities in the signal chain. By using highly linear components in the signal chain, a high spur-free dynamic range (SFDR) can be maintained by the digitizer. SFDR is the measure of how far down a receiver can detect a small signal in the presence of multiple larger signals creating intermodulation spurs (in dB relative to the primary signal). This minimizes the risk of incorrectly identifying a target or falling victim to a spoofing attack.

Newer architectures move the suboctave preselect filters further away from the antenna to minimize noise figure and maximize dynamic range. However, this also presents challenges in generating and amplifying harmonic and intermodulation content throughout the receiver. As such, new methods are required to manage these unwanted tones.

A Brief Comparison of Receiver Architectures

RF sampling architectures are essential in the design of modern radio receivers, and the choice of architecture has a significant impact on the harmonic performance of the system. Let’s briefly compare some of the trade-offs of two common RF sampling architectures: Direct RF sampling and heterodyne converters.

Historically, heterodyne architectures, as shown in Figure 1, have been popular for a number of reasons. Chief among them were the availability of RF components for performance and sufficiently fast data converters for IF sampling and very high dynamic range. Heterodyne architectures provide reasonable linearity, frequency agility, and the potential for very good harmonic and spurious performance when combined with multiple filtering stages at both intermediate frequency (IF) and radio frequency (RF). Heterodyne architectures typically exhibit moderate second harmonic and IP2 performance. However, mixing the RF signal with a local oscillator (LO) introduces tones that can degrade linearity. Careful design and filtering can mitigate these issues. In addition, heterodyne receivers offer good blocking performance due to the selectivity provided by the IF stage.

Figure 1. Standard heterodyne receiver architecture.

Heterodyne designs are limited by their complexity, potential for harmonic generation, and the need for challenging frequency plans to achieve harmonic suppression. Additionally, high performance heterodyne receivers, especially at higher RF frequencies, require a significant number of components, leading to higher material costs.

Looking at newer technology, direct RF sampling receivers, shown in Figure 2, offer the potential for excellent harmonic performance and very high linearity with the right components. Direct RF sampling achieves this by direct sampling the RF signal at the desired frequency without downconversion stages. Consequently, direct RF sampling exhibits very good second harmonic and IP2 performance. As noted in the heterodyne receiver, mixing stages can introduce additional harmonics. It is important to note that the linearity of the ADC and the circuitry driving the ADC play a critical role in determining IP2, IP3, and intermodulation performance metrics.

Figure 2. Basic direct sampling receiver architecture.

Direct RF sampling, while offering advantages in terms of linearity and harmonic performance, is not without its challenges. Receivers that use direct-sample architectures may be susceptible to interference from out-of-band and in-band blocker signals because the receivers capture a wide spectrum of frequencies. Effective filtering and RF front-end design are crucial for mitigating the impact of these blockers. Furthermore, direct RF sampling receivers can face challenges related to DC power dissipation and cost. The high speed converters and FPGA processing demands can result in heavy power requirements, which need to be carefully managed.

A more detailed comparison of receiver architectures is available in “A Review of Wideband RF Receiver Architecture Options.”

Second- and Third-Order Harmonics, IMD2, and IMD3

For both heterodyne and direct sampled architectures, there are key performance trade-offs to consider. One of the key metrics is tone linearity, which is often the focus of design discussions. Second- and third-order harmonics, as well as intermodulation distortion (IMD) products, are the most common sources of internally and externally generated interference signals. Understanding the origin and impact of these interference tones is crucial for system designers, as well as knowing how to mitigate their effects.

Figure 3 shows the spectrum that results when two adjacent tones are applied to an RF amplifier. The popular two-tone test is widely used to measure third-order intermodulation products that appear adjacent to the tones (at 2F1-F2 and 2F2-F1). This test simulates a signal arriving at the receiver close in frequency to the main tone. The delta between the power of the fundamental and the IMD3 tones is used to calculate output third-order intercept (OIP3), as shown in Equation 1:

Equation01.

where P₀ is the fundamental tone output power.

OIP3 is a critical RF system specification as it can predict the adjacent channel power ratio (ACPR) as well as being a measure of a system’s ability to tolerate in-channel blockers.

Figure 3. Second harmonics, third harmonics, IMD2, and IMD3 products produced by a two-tone excitation.

Examining Figure 3 further, observe that the two-tone test produces other by-products. These include second and third harmonics of the original tones at 2F1, 2F2, 3F1, and 3F2; IMD3 tones at 2F1+F2 and 2F2+F1; and a second-order intermodulation tone at F1+F2. The delta between the fundamental tones and the tone at F1+F2 is used to calculate the second-order intercept, or OIP2, as shown in Equation 2.

Equation02.

In traditional narrowband heterodyne receivers, IP2 and second and third harmonics are of lesser concern due to the filtering that occurs in IF stages. However, there is less filtering in direct sampling receivers, meaning that the level of these products must be considered. For example, as a 2 GHz to 18 GHz EW receiver scans, harmonic products generated within the receiver have the potential to create false alarms or mask genuine threats.

ADCs Enabling Direct Sampling

The AD9088 and AD9084 are part of a family of multichannel RF sampling ADC/DACs with analog input bandwidths of 16 GHz and 18 GHz, respectively. Figure 4 shows a cutaway block diagram of the AD9088 focusing on its RF sampling ADC. While the AD9084 features a differential input structure, the AD9088 integrates a balun and has a single-ended input resistance of 50 Ω. When considering driving these ADCs with an RF amplifier, it is useful to express the devices’ specs in the dB power domain (as shown in Figure 4). By converting dBFS (decibels relative to full scale) specifications to dBm (decibels relative to 50 Ω), the full-scale input, along with input-referred IP2 and IP3 can be expressed in dBm. For example, if two tones at –15 dBm at 5.2 GHz, applied to the input of the AD9084, produce an F1+F2 IMD2 product at –59.3 dBc, then that yields an equivalent IIP2 of 44.3 dBm. Likewise, the second and third harmonics can be expressed in dBc (decibels relative to the carrier) and the noise can be expressed in dBm/Hz.

Figure 4. The AD9084 and AD9088 ADC with input-referred RF specifications.

Harmonic Performance of a Typical Wideband RF Amplifier

Optimizing receiver designs for high linearity, or minimizing the impact of harmonics and their products as the receiver input power increases, is fundamental to improving the sensitivity of the receiver. Minimizing internally generated harmonics and intermods can be achieved by filtering and careful frequency planning, but in contested and noisy environments, system designers must also consider multitone inputs to the receiver. The intrinsic harmonic performance of each signal chain block directly impacts the overall system performance.

Among the various components in RF signal chains, RF amplifiers typically contribute significantly to the internally generated harmonic content. Wideband amplifiers, those that cover broad frequency ranges such as octaves or decades, may exhibit IP2 and IP3 values in the 30 dBm range, which can vary over frequency. As shown in Figure 3, third harmonics can generate close-in spurs, though these can be mitigated with proper RF and IF filtering. Second harmonics tend to be out of band for filtered applications in heterodyne receivers and are of lesser concern. In a wideband direct sampled RF receiver, these second harmonic products can fall within the desired frequency band and become challenging to filter. To address this, ADI has developed high IP2 amplifiers.

Figure 5 shows a block diagram and basic connections circuit for the ADL7078, a new wideband LNA from ADI. The LNA offers high input survivability of 32 dBm (potentially reducing the need for a limiter) and high OIP2 of 48 dBm typical, as shown in Figure 6. The LNA operates from a single positive supply and its bias current is set by a resistor connected between the RBIAS pin and VDD. The RF input and output are AC-coupled and the VDD bias inductor is integrated into the chip.

Figure 5. A block diagram of the ADL7078.

Figure 6. Gain, noise figure, OIP2, and OIP3 of the ADL7078.

Along with several of ADI’s recent RF amplifier releases, the ADL7078 integrates circuit elements into the package and on-die that are often required externally. This integration minimizes board space and simplifies the design process. The package includes DC blocking capacitors on both RF input and output, as well as an integrated bias inductor that enables direct DC bias to the chip package. In addition, the LNA benefits from recent advances in device fabrication and design, eliminating the need for a negative voltage supply to properly bias the gate of the amplifier. This not only simplifies the power supply design but also eliminates the need for sequencing voltage supplies. As shown in Figure 5, the ADL7078 only requires supply line filtering and a single external resistor to set the quiescent drain current, I_dq.

In a typical wideband, multioctave distributed amplifier, the IP2 performance exhibits a V-shaped curve, as shown in Figure 7. Below the midpoint of a two-octave bandwidth, the second harmonic remains in-band, resulting in either flat or decreasing IP2 performance with frequency. Once the second harmonic moves out of band, the IP2 begins to improve through the high end of the amplifier’s passband. In contrast, the ADL7078, and its lower frequency companion part, the ADL8104, demonstrates relatively flat IP2 performance across their entire operating bandwidth. Additionally, the IP2 performance in these amplifiers is generally higher in magnitude compared to a typical distributed amplifier. This makes them ideal choices as ADC drivers in multioctave, direct sampling RF signal chains.

Figure 7. ADL8100 IP2, typical IP2 performance in wideband, distributed, multioctave amplifiers.

Using the ADL7078 in Direct Sampling Receivers

Bringing together the discussion of comparing receiver architectures and the importance of high linearity amplifiers, simulations of direct sampling and heterodyne receivers were run to show the differences in performance. Through these simple signal chain simulations, it quickly becomes evident why using amplifiers designed for high linearity provides significant benefit to spur-free dynamic range.

One way to look at the IP2 performance of a signal chain is to look at each component and its contribution to the cascaded IP2, identifying potential bottlenecks. This input-referenced system simulation offers a visual depiction of performance, facilitating design decisions. However, it provides information for a single frequency per trace.

In Figure 8, we can see that the first bottleneck is the receive LNA, the first active component in the signal chain. When using a high IP2 amplifier compared to a typical wideband LNA, the input IP2 (IIP2) is about 20 dBm better. The next bottle-neck in either signal chain is the mixer, which generates harmonics and mixing products of harmonics, negatively impacting harmonic performance. Subsequent filtering stages should improve the harmonic performance and reduce the spurious content reaching the ADC.

Figure 8. Heterodyne receiver cascaded input IP2.

Similarly, in Figure 9, which shows the direct sampled receiver, it is evident that the influence of the sole bottleneck at the LNA significantly affects the spurious content reaching the ADC. Simply changing this one component results in a 20 dBm difference in performance, reducing the energy at harmonic frequencies by nearly 7 times.

Figure 9. Direct sampling receiver cascaded input IP2.

To further understand the impact of high linearity, high IP2 amplifiers like the ADL7078 and the ADL8104, it is beneficial to examine the spurious content reaching the ADC in the case of a single input tone at 8 GHz with a blocker tone at 3 GHz, –10 dBc from the primary input tone. Focusing solely on the direct sampling architectures depicted in Figure 2, as heterodyne receivers introduce additional mixing products that may complicate the comparison, it becomes apparent that the primary tones (normalized to 0 dBm) generate some harmonic content and the primary tone interacts with the blocker tone to generate intermodulation products. Although the harmonic content is filtered before reaching the ADC, it still exists with significant magnitude, and the intermodulation products create unwanted signal noise. In Figure 10, the strongest intermodulation tone, at 5 GHz, is measured at –50 dBc. In Figure 11, the same tone reaching the ADC is observed at –23 dBc. This substantial difference in energy directly impacts receiver sensitivity and highlights the importance of reducing harmonic and intermodulation content to achieve optimal performance through amplifier selection.

Figure 10. Spurious content at input of ADC with the ADL7078 high IP2 LNA and direct sampled receiver; fundamental tone normalized to 0 dBm.

Figure 11. Spurious content at input of ADC with normal LNA and direct sampled receiver; fundamental tone normalized to 0 dBm.

Conclusion

With the emergence of high speed RF sampling ADCs, there is a growing need for wideband driver circuits with comparable IP2 and IP3 performance to traditional heterodyne receivers. The wideband sampling bandwidths and the potential presence of in-band blockers and interference signals have placed greater emphasis on the second harmonic and intermodulation performance of LNAs and ADC drivers. Additionally, third harmonic and intermodulation performance remain crucial factors in evaluating wideband amplifiers. ADI’s high IP2 amplifiers, namely the ADL7078 and ADL8104, deliver the highest IP2 performance among single amplifier ICs available on the market. These amplifiers are well-suited as ADC drivers in wideband systems. They offer integration of AC-coupling capacitors and bias inductors, allowing for a compact external footprint and enhanced power efficiency. Furthermore, the ability to control the bias current of the driver amp from the ADC adds to their versatility and ease of use.