DS2175

T1/CEPT弹性存储器

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产品详情

Rate buffer for T1 and CEPT transmission systems
Synchronizes loop-timed and system-timed data streams on frame boundaries
Ideal for T1 (1.544 MHz) to CEPT (2.048MHz), CEPT to T1 interfaces
Supports parallel and serial backplanes
Buffer depth is 2 frames
Comprehensive on-chip "slip" control logic
- Slips occur only on frame boundaries
- Outputs report slip occurrences and direction
- Align feature allows buffer to be recentered at any time
- Buffer depth easily monitored
Compatible with DS2180A T1 and DS2181A CEPT Transceivers
Industrial temperature range of -40°C to +85°C available, designated DS2175N