DS2151Q

T1单芯片收发器

数据手册 (Rev. 2)

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产品详情

Complete DS1/ISDN-PR1 transceiver
Short- and long-haul trunk capability
Independent send and receive functions
32-bit or 128-bit jitter attenuator
DSX-1 and CXU line build-outs
D4, ESF, and SLC-96^R framing
Dual onboard elastic buffers connect to backplanes up to 8.192MHz
Programmable output clocks for Fractional T1
8-bit parallel control port can be muxed or nonmuxed
Extracts/inserts robbed-bit signals
Detects/generates yellow and blue alarms
Onboard FDL support circuitry
Generates/detects CSU loop codes
ANSI one's density monitor/enforcer
Path and line error counters, including BPV, CV, CRC6, and framing bit errors
Pin-compatible with DS2153Q
Operating ranges:
- 5.0V
- 0°C to +70°C (DS2151Q)
- -40°C to +85°C (DS2151QN)

参考资料

数据手册 2

DS2151Q: T1 Single Chip Transceiver Data Sheet (Rev.2) 01/23/2006

DS2151Q: T1单芯片收发器 Data Sheet 01/01/1900

可靠性数据 1

DS2151Q Reliability Data 01/12/2023

应用笔记 1

DS2152L vs. DS2151Q 03/29/2001

设计笔记 3

Programming and Controlling the FDL on DS2141A, DS2151 05/11/2001

D4 Framing and Signaling 08/10/2001

Elastic Store Operation 06/28/2004

这是最新版本的数据手册

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