AD4052
推荐新设计使用Compact, Low Power, 16-Bit, 2 MSPS/500 kSPS Easy Drive SAR ADC
- 产品模型
- 3
产品详情
- Small footprint, big performance
- INL: ±0.5 LSB maximum
- SNR: 86.1 dB with VREF = 3.3 V
- 1.35 mW at 1 MSPS in Sample Mode
- 370 μW at 1 MSPS in Autonomous Modes
- 4.1 μW standby power
- Versatile signal conditioning integration
- Easy Drive features enable small, low-power analog front end designs
- Compatible with differential and single-ended signal chains
- Wide common-mode input range
- Minimizes digital host activity and power dissipation
- Autonomous sampling with window comparator and interrupt generation
- Averaging filter with continuous and burst sampling options
- Power cycling synchronization for companion devices
- 4-wire SPI compatible with 1.8 V to 3.3 V logic
- 2.0 mm × 2.6 mm LFCSP and 1.7 mm × 2.0 mm WLCSP
- Wide operating temperature range: −40°C to +125°C
The AD4052/AD4058 areversatile, 16-bit, successive approximation register (SAR) analog-to-digital converter (ADC) that enables low-power, high-density data acquisition solutions without sacrificing precision. This ADC offers a unique balance of performance and power efficiency, plus innovative features for seamlessly switching between high-resolution and low-power modes tailored to the immediate needs of the system. The AD4052/AD4058 are ideal for battery-powered, compact data acquisition and edge sensing applications.
The Easy Drive features enable highly efficient analog front end (AFE) designs. The small sampling capacitors (3.4 pF) maximize input impedance, thus reducing the dependence on high-bandwidth, power-hungry amplifiers typically required by SAR ADCs. The wide input common-mode range grants inherent support for both differential and single-ended signals.
The AD4052/AD4058 support microcontrollers with power-down modes and interrupt-driven firmware. The autonomous modes enable out-of- range event detection while the digital host sleeps. The averaging modes deliver on-demand, high-resolution measurements while offloading computations from the host processor. The self-timed device enable signal (DEV_EN) synchronizes AFE device power cycling to the ADC sampling instant, optimizing system power consumption while minimizing power-up settling error artifacts. The AD4052/AD4058 also supports power cycling the voltage reference and using the supply as the ADC reference voltage (VREF) for additional power savings.
Device configuration and ADC data readback are supported via a robust, 4-wire serial peripheral interface (SPI) with cyclic redundancy check (CRC) supported for all data transfers. The AD4052/AD4058 are available in compact LFCSP and WLCSP packages and operates across a wide temperature range, making it ideal for a diverse set of applications.APPLICATIONS
- Battery-powered data acquisition
- Vital signs monitoring
- Biological and chemical analysis
- Geologic and seismic sensing
- Motion and robotics
参考资料
数据手册 1
用户手册 1
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| 产品型号 | 引脚/封装图-中文版 | 文档 | CAD 符号，脚注和 3D模型 |
|---|---|---|---|
| AD4052BCBZ-RL7 | CHIPS W/SOLDER BUMPS/WLCSP | ||
| AD4052BCPZ-R2 | LFCSP:LEADFRM CHIP SCALE | ||
| AD4052BCPZ-RL7 | LFCSP:LEADFRM CHIP SCALE |
这是最新版本的数据手册
软件资源
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Evaluation Software 0
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LTspice
LTspice中提供以下器件型号：
- AD4052
IBIS 模型 1
LTspice®是一款强大高效的免费仿真软件、原理图采集和波形观测器，为改善模拟电路的仿真提供增强功能和模型。
评估套件
Evaluating the AD4050/AD4052 Compact, Low Power, 12-Bit/16-Bit, 2 MSPS Easy Drive SAR ADCs
资料
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