概览

优势和特点

  • RF 频率范围:24 GHz 至 29.5 GHz,将 n257、n258 和 n261 频段集成在一个空间内
  • 16 个可选的 TX 通道
  • 16 个可选的 RX 通道
  • 水平和垂直极化
  • 匹配的 50Ω 单端 RF 输入和输出
  • 通过高分辨率矢量调制器实现相位控制
  • 通过高分辨率 DGA 实现幅度控制
  • 温度补偿
  • 通过存储器存储 TX 和 RX 波束位置
  • 工作温度高达 95°C
  • 符合 3GPP 规范

产品详情

The ADMV4821 is a silicon germanium (SiGe), 24 GHz millimeterwave (mmW) to 29.5 GHz mmW 5G beamformer. The RF IC is highly integrated and contains 16 independent channels with both transmit and receive functionality. The ADMV4821 supports eight horizontal and eight vertical polarized antennas via the independent RFV and RFH inputs/outputs common pins.

In transmit mode, both the RFV and RFH input signals are split via two independent 1:8 power splitters and pass through the eight, independent, corresponding transmit channels. In this mode, each channel includes a vector modulator (VM) to control the phase and two digital variable gain amplifiers (DVGAs) to control the amplitude.

In receive mode, input signals pass through two sets of eight receive channels (either vertical or horizontal) and are combined via one independent 8:1 combiner connected to the RFV pin and one independent 8:1 combiner connected to the RFH pin. In this mode, each channel includes a VM to control the phase and a DVGA to control the amplitude.

The VM provides a full 360° phase adjustment range in either transmit or receive mode. The VM provides six bits of resolution for 5.625° phase steps.

In transmit mode, the total DVGA dynamic range adjustment range is 32.4 dB. The DVGAs provide five bits or six bits of resolution, resulting in 1.0 dB or 0.5 dB amplitude steps, respectively.

In receive mode, the DVGA allows for 17.1 dB of dynamic range adjustment. The DVGA also provides six bits of resolution, resulting in 0.5 dB amplitude steps. The DVGAs provide a flat phase response across the full gain range.

The transmitter channels contain individual power detectors to detect and calibrate the gain for each channel as well as the channel to channel gain mismatch. Directly connect the ADMV4821 RF ports to a patch antenna to create a dual polarization mmW 5G subarray.

Users can program the ADMV4821 by using a 3-wire or 4-wire serial port interface (SPI). The integrated on-chip low dropout (LDO) regulator generates the 1.8 V supply for the SPI circuitry to reduce the number of supply domains required. There are various SPI modes to enable fast startup and control during normal operation.

Users can either set the amplitude and phase for each channel individually or program multiple channels simultaneously by using the on-chip memory for beamforming. The on-chip memory can store up to 256 beam positions, which can be allocated for either transmitter or receiver mode in any combination. In addition, four address pins allow SPI control of up to 16 devices on the same serial lines. Dedicated horizontal and vertical polarization load pins also synchronize all devices in the same array. There is a horizontal and vertical polarization transmit and receive mode control pins (TRXV and TRXH) for fast switching between transmit and receive mode.

The ADMV4821 comes in a compact, thermally enhanced 10 mm × 10 mm, RoHs compliant land grid array (LGA) package. The ADMV4821 operates over the −40°C to +95°C case temperature range. This LGA package allows users to heat-sink the ADMV4821 from the top side of the package for the most efficient thermal heatsinking and to allow flexible antenna placement on the opposite side of the printed circuit board (PCB).

Throughout the figures in the data sheet, Tx means transmit (or transmitter) and Rx means receive (or receiver).

APPLICATIONS

  • 5G applications
  • Broadband communication
  • Test and measurement
  • Aerospace and defense
  • 填写保密协议 (NDA) (pdf) 后即可使用完整文档。将填写完的表格通过电子邮件发送至 mmWave5G@analog.com。可以从 ADI 公司的本地销售人员获得更多支持。

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