| 快讯名称 |
内容类型 |
文件类型 |
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AD9857: CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter Data Sheet (Rev C, 05/2004) (pdf, 1065 kB)
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产品数据手册 |
PDF
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AN-0996: 在点对点微波发射系统中使用正交数字上变频器(QDUC)的优势
(pdf, 388 kB)
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应用笔记 |
PDF
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AN-0996: The Advantages of Using a Quadrature Digital Upconverter (QDUC) in Point-to-Point Microwave Transmit Systems
(pdf, 219 kB)
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应用笔记 |
PDF
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AN-924: 数字正交调制器增益
(pdf, 105 kB)
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应用笔记 |
PDF
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AN-924: Digital Quadrature Modulator Gain
(pdf, 105 kB)
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应用笔记 |
PDF
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AN-922: 数字脉冲整形滤波器基础知识
(pdf, 1582 kB)
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应用笔记 |
PDF
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AN-922: Digital Pulse-Shaping Filter Basics
(pdf, 1582 kB)
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应用笔记 |
PDF
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AN-851: 一种WiMax双下变频IF采样接收机设计方案[中文版]
(pdf, 421 kB)
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应用笔记 |
PDF
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AN-851: A WiMax Double Downconversion IF Sampling Receiver Design
(pdf, 262 kB)
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应用笔记 |
PDF
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AN-837: 基于DDS的时钟抖动性能与DAC重构滤波器性能的关系[中文版]
(pdf, 416 kB)
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应用笔记 |
PDF
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AN-837: DDS-Based Clock Jitter Performance vs. DAC Reconstruction Filter Performance
(pdf, 313 kB)
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应用笔记 |
PDF
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AN-823: 时钟应用中的直接数字频率合成器[中文版]
(pdf, 303 kB)
基于直接数字频率合成器的时钟系统的时间抖动
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应用笔记 |
PDF
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AN-823: Direct Digital Synthesizers in Clocking Applications Time
(pdf, 115 kB)
Jitter in Direct Digital Synthesizer-Based Clocking Systems
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应用笔记 |
PDF
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AN-237: 放大器直接数字频率合成的DAC选型器应用漫谈
(pdf, 1156 kB)
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应用笔记 |
PDF
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AN-237: Choosing DACs for Direct Digital Synthesis
(pdf, 1156 kB)
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应用笔记 |
PDF
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A Technical Tutorial on Digital Signal Synthesis
(pdf, 901 kB)
Copyright © 1999 Analog Devices, Inc.
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设计手册 |
PDF
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高性能时钟: 解密抖动
现在每个电子设备一般都有多个时钟，所以必须考虑到这些时钟的抖动性能。低抖动和低相位噪声的时钟对数字信号的处理是非常重要的。所谓时钟抖动是指时钟触发沿的随机误差，通常可以用两个或多个时钟周期之间的差值来量度，这个误差是由时钟发生器内部产生的。时钟的抖动将会影响到仪表的精确测量，在无线通信中将会引起更高的误码率和不良的通信质量，时钟的相位噪声也会引起数据误差和降低数据吞吐量。因此，欢迎大家和我们一起探讨亚皮秒抖动的时钟性能。在这次在线研讨会上，我们将详细探讨抖动和相位噪声的关系以及亚皮秒抖动和超低相位噪声的测量方法。这次在线研讨会还将会涵盖高性能时钟IC的应用考虑。ADI公司的新型ADIsimCLK时钟仿真工具的使用也将会在这次研讨会上作详细介绍。
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在线研讨会 |
WEBCAST
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Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
This month we conclude our two-part series on frequency synthesis, with an introduction to Direct Digital Synthesis. We will give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We will also discuss the tradeoffs between PLL and DDS technology as a base choice for frequency synthesis needs.
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在线研讨会 |
WEBCAST
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Speedy A/Ds Demand Stable Clocks
by Jeff Keip, Analog Devices, Inc. (EE Times, 3/18/04)
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技术文章 |
HTML
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Improved DDS Devices Enable Advanced Comm Systems
by Valoree Young, Analog Devices
(Electronic Products, September 2006)
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技术文章 |
HTML
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Introducing Digital Up/Down Converters: VersaCOMM™ Reconfigurable Digital Converters
(pdf, 63 kB)
Revolutionize your radio architectures
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技术文章 |
PDF
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Digital Up/Down Converters: VersaCOMM™ White Paper
(pdf, 97 kB)
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技术文章 |
PDF
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Basics of Designing a Digital Radio Receiver (Radio 101)
(pdf, 77 kB)
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技术文章 |
PDF
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The Year of the Waveform Generator
(Test & Measurement World, 12/1/2005)
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技术文章 |
HTML
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DDS Simplifies Polar Modulation
By Ken Gentile, Analog Devices ... Basic modulation mathematics and DDS (direct digital synthesis) provide designers with an all-digital technique for generating polar-encoded carrier signals. (EDN, 8/5/2004)
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技术文章 |
HTML
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Digital Upconverter IC Tames Complex Modulation
(pdf, 837 kB)
by Ken Gentile, Analog Devices, Inc.
... An improved 14-bit architecture, simplified synchronization, and enhanced power-saving circuitry are a few of the features of this quadrature digital upconverter.
(Reprinted with permission of Microwaves & RF where it first appeared in the August 2000 issue)
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技术文章 |
PDF
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应用工程师问答——33：直接数字频率合成全攻
(模拟对话，第38卷，2004年8月)
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《模拟对话》杂志 |
HTML
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Free Direct Digital Synthesis IC Evaluation Tool
(Control Engineering, 9/14/2006)
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产品评述 |
HTML
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On-Line Evaluation Tool Simplifies Implementing DDS Semiconductors
(eeProductCenter, 8/16/2006)
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产品评述 |
HTML
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Are there any specific recommendations for material in the vias of the circuit board for the thermally enhanced package styles in which some ADI DDS' are available?
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常见问题解答 |
HTML
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I have limited experience working with thermally enhanced packages. Where can I get information concerning the proper techniques for soldering and assembly?
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常见问题解答 |
HTML
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I need to operate my DDS part above the rated temperature range. Can you give me any reliability data?
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常见问题解答 |
HTML
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Are any of your DDS products space qualified?
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常见问题解答 |
HTML
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Why did the model numbers change on the AD9852 and AD9854 products? I thought they were available in the ASQ package.
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常见问题解答 |
HTML
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If the port has a differential REF CLK, and I want to use a single-ended clock, what do I do with the other differential input?
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常见问题解答 |
HTML
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If I violate the proper logic level of the REF CLK (that is, underdrive or overdrive it), what can I expect?
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常见问题解答 |
HTML
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What type of signal source is recommended?
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常见问题解答 |
HTML
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Why does spectral performance degrade when using larger values of multiplication on the clock multiplier?
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常见问题解答 |
HTML
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Can the DDS evaluation boards be integrated directly into a system project?
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常见问题解答 |
HTML
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I am having problems getting my evaluation software to see my evaluation board; what should I do to correct the problem?
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常见问题解答 |
HTML
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Is all DDS software supplied by Analog Devices compatible with all WinXX versions?
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常见问题解答 |
HTML
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What is the proper termination for the DAC outputs for the DDS products?
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常见问题解答 |
HTML
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Why can't I see a signal at the output of my DDS when it is unterminated? (I'm setting everything correctly, but I'm just probing the output pins of the DDS which have nothing connected to them.)
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常见问题解答 |
HTML
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How can I synchronize multiple DDS parts?
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常见问题解答 |
HTML
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Can I gate the REF CLK on and off?
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常见问题解答 |
HTML
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What kind of problems can I expect from exceeding the maximum clock rate? (power dissipation, spectral problems)
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常见问题解答 |
HTML
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What is the effect of REF CLK jitter on the DDS?
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常见问题解答 |
HTML
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What are the proper logic input levels for the DDS parts?
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常见问题解答 |
HTML
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What are the advantages and disadvantages of serial and parallel mode?
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常见问题解答 |
HTML
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Can I read back data at the same rate that I can write the data to the DDS device?
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常见问题解答 |
HTML
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What logic families can interface with our parts?
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常见问题解答 |
HTML
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What is the maximum speed I can write to the part?
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常见问题解答 |
HTML
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I would like to update the FTW of my DDS, but only a single byte of the FTW needs to change. Can the frequency tuning word of a DDS be partially updated a byte at a time?
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常见问题解答 |
HTML
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What layout recommendations do you have for the power supply pins of the DDS device?
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常见问题解答 |
HTML
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What is the effect of increasing my supply voltage beyond the nominal recommended value?
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常见问题解答 |
HTML
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I have limited power to supply to the part. What can I do to reduce the power consumption of the device and thus ensure that my supply is adequate?
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常见问题解答 |
HTML
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Do you recommend a linear or switching power supply?
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常见问题解答 |
HTML
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Should I separate digital and analog ground planes on my evaluation board?
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常见问题解答 |
HTML
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Can I use the same power supply for AVDD and DVDD?
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常见问题解答 |
HTML
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What is the ratio between the analog and digital currents drawn by the DDS devices?
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常见问题解答 |
HTML
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I'm not using all the blocks of the AD9858. What do I do with the unused inputs of these sections?
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常见问题解答 |
HTML
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What causes a Quadrature Digital Upconverter (AD9856, AD9857) to go into a CIC overflow condition?
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常见问题解答 |
HTML
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How do I use a DDS for a clock driver?
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常见问题解答 |
HTML
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How do I perform amplitude modulation on the output?
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常见问题解答 |
HTML
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How can I control the envelope of the output?
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常见问题解答 |
HTML
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How do I change the phase of my output signal?
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常见问题解答 |
HTML
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Are frequency changes of a DDS phase coherent?
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常见问题解答 |
HTML
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Does Analog Devices offer a list of manufacturers of oscillators for DDS devices?
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常见问题解答 |
HTML
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Where can I find some good background material on direct digital synthesis?
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常见问题解答 |
HTML
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RAQs index
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非常见问题解答 |
HTML
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术语表
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专业词汇表 |
HTML |
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