Overview

Features and Benefits

  • Dual differential transmitters (Tx)
  • Dual differential receivers (Rx) 
  • Observation receiver (ORx) with 2 inputs 
  • Sniffer receiver (SnRx) with 3 inputs
  • Tunable range: 300 MHz to 6000 MHz 
  • Tx synthesis bandwidth (BW) to 250 MHz 
  • Rx BW: 8 MHz to 100 MHz 
  • Supports frequency division duplex (FDD) and time division duplex (TDD) operation
  • Fully integrated independent fractional-N radio frequency (RF) synthesizers for Tx, Rx, ORx, and clock generation
  • JESD204B digital interface

Product Details

The AD9371 is a highly integrated, wideband RF transceiver offering dual channel transmitters and receivers, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption required by 3G/4G micro and macro BTS equipment in both FDD and TDD applications. The AD9371 operates from 300 MHz to 6000 MHz, covering most of the licensed and unlicensed cellular bands. The IC supports receiver bandwidths up to 100 MHz. It also supports observation receiver and transmit synthesis bandwidths up to 250 MHz to accommodate digital correction algorithms.

The transceiver consists of wideband direct conversion signal paths with state-of-the-art noise figure and linearity. Each complete receiver and transmitter subsystem includes dc offset correction, quadrature error correction (QEC), and programmable digital filters, eliminating the need for these functions in the digital baseband. Several auxiliary functions such as an auxiliary analog- to-digital converter (ADC), auxiliary digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) are integrated to provide additional monitoring and control capability.

An observation receiver channel with two inputs is included to monitor each transmitter output and implement interference mitigation and calibration applications. This channel also connects to three sniffer receiver inputs that can monitor radio activity in different bands.

The high speed JESD204B interface supports lane rates up to 6144 Mbps. Four lanes are dedicated to the transmitters and four lanes are dedicated to the receiver and observation receiver channels.

The fully integrated phase-locked loops (PLLs) provide high performance, low power fractional-N frequency synthesis for the transmitter, the receiver, the observation receiver, and the clock sections. Careful design and layout techniques provide the isolation demanded in high performance base station applications. All voltage controlled oscillator (VCO) and loop filter components are integrated to minimize the external component count.

A 1.3 V supply is required to power the core of the AD9371, and a standard 4-wire serial port controls it. Other voltage supplies provide proper digital interface levels and optimize transmitter and auxiliary converter performance. The AD9371 is packaged in a 12 mm × 12 mm, 196-ball chip scale ball grid array (CSP_BGA).

Applications

  • 3G/4G micro and macro base stations (BTS)
  • 3G/4G multicarrier picocells 
  • FDD and TDD active antenna systems 
  • Microwave, nonline of sight (NLOS) backhaul systems

Product Lifecycle icon-recommended Recommended for New Designs

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

Evaluation Kits (1)

Software & Systems Requirements

Evaluation Software

Wideband RF Transceiver Evaluation Software

The Evaluation kit offers several software drivers for evaluation and rapid prototyping as well as design tool options to aid in simulation and filter design.

JESD204 Interface Framework

Integrated JESD204 software framework for rapid system-level development and optimization

Tools & Simulations

Product Recommendations

AD9371 Companion Parts

Recommended Clock Driver

  • For clocking, two stage clock generation solution with 14 LVDS/HSTL outputs: AD9528.

Recommended Power Solutions

  • The evaluation kit uses this buck regulator to power the AD9371 directly (no LDO regulators). For power:

    ADP5054.

Reference Materials

Design Resources

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

Discussions

AD9371 Discussions

Ad9371 multichipsyncronization failing.
8 week(s) ago in TES GUI & API Software Support AD9371/AD9375
Is there ACE tool support for AD9371
17 week(s) ago in TES GUI & API Software Support AD9371/AD9375
AD9371 gain_table_config
22 week(s) ago in Linux Software Drivers
AD9371 Didn't find what you were looking for? Ask the Analog community »

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The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.


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Evaluation Boards Pricing displayed is based on 1-piece.
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.