16-Bit, 12 GSPS, RF DAC and Direct Digital Synthesizer
The AD9164 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications. The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator. When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.
In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastruc-ture compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2× interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.
An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in an 165-ball, 8 mm × 8 mm, 0.5 mm pitch CSP_BGA package, and an 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.
- High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz.
- Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed.
- Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin.
- Broadband communications systems
- DOCSIS 3.1 cable modem termination system (CMTS)/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM)
- Wireless communications infrastructure
- W-CDMA, LTE, LTE-A, point to point
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
The AD9161, AD9162, AD9163, and AD9164 evaluation boards are all FMC form-factor boards with FMC connector that complies to the Vita 57.1 standard. There are three variants of the board (-FMC, -FMCB, -FMCC) that accommodate slightly different Bills of Material (BOMs).
- The -FMC boards are designed for the 8x8mm package variant of the AD9162 and AD9164 and use a Marki Microwave wideband balun on the DAC output.
- The -FMCB boards are designed for the same 8x8mm package variant of the AD9162 and AD9164, and use a Mini-Circuits balun on the DAC output.
- The -FMCC boards are designed for the 11x11mm package variant and accommodates all four of the AD9161, AD9162, AD9163, and AD9164. It also uses a Mini-Circuits balun on the DAC output.
To operate the evaluation boards, the user must attach the board to a compatible FMC carrier board, such as those provided by FPGA vendors. Analog Devices produces an FPGA carrier called the ADS7-V2, which serves as a digital pattern generator or data source as well as the power supply for the boards. The AD9162 and AD9164 boards have an option to be powered from a lab power supply when used in a special NCO-only mode. This operation is described in more detail in the User's Guide. The user must be able to observe the DAC output on a spectrum analyzer. A low noise clock source is provided on the evaluations boards, the ADF4355 PLL, and an option exists for the user to supply a low jitter external sine or square wave clock as a clock source instead. The evaluation board comes with software, called ACE, which allows the user to program the SPI port. Via the SPI port, the DUT (and clock circuitry) can be programmed into any of its various operating modes.
Documentation and software updates for using High-Speed DAC Evaluation Boards are included in individual, self-extracting update files.
Evaluation Boards Differences
The differences between the AD9161, AD9162, AD9163, and AD9164 FMC boards are the DAC, package, and its output Balun are shown in the User Guide. For example, the AD916x-FMCx-EBZ uses the Marki BAL-0009SMG and the AD916x-FMCB-EBZ uses the Mini-Circuits TC1-1-43A+.
FPGA Interoperability Reports
Altera AN-785 (AD9161/AD9162/AD9163/AD9164 Arria10)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Using an AD9164-FMC with an ADS7-V2, is it possible to control the AD9164 DAC output with an external signal?5 week(s) ago in Speed DACs
- 12 week(s) ago in Speed DACs
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.