AD9446: 16-Bit, 80 MSPS / 100 MSPS A/D Converter
The AD9446 is a 16-bit, monolithic, sampling analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use. The product ...More
AD9446: 16-Bit, 80 MSPS / 100 MSPS A/D Converter
Product Description
The AD9446 is a 16-bit, monolithic, sampling analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use. The product operates up to 100 MSPS, providing superior SNR for instrumentation, medical imaging, and radar receivers employing baseband (<100 MHz) IF frequencies.
The ADC requires 3.3 V and 5.0 V power supplies and a low voltage differential input clock for full performance operation. No external reference or driver components are required for many applications. Data outputs are LVDS-compatible (ANSI-644) or CMOS-compatible and include the means to reduce the overall current needed for short trace distances.
Optional features allow users to implement various selectable operating conditions, including data format select and output data mode.
The AD9446 is available in a 100-lead surface-mount plastic package (100-lead TQFP/EP) specified over the industrial temperature range (−40°C to +85°C).
Product Highlights
1. True 16 bit linearity.
2. High performance: outstanding SNR performance for baseband IFs in data acquisition, instrumentation, magnetic resonance imaging, and radar receivers.
3. Ease of use: On-chip reference and high input impedance track-and-hold. An output clock simplifies data capture.
4. Packaged in a Pb-free, 100-lead TQFP/EP.
5. Clock duty cycle stabilizer (DCS) maintains overall ADC performance over a wide range of clock pulse widths.
6. OR (out-of-range) outputs indicate when the signal is beyond the selected input range.
Applications
- Data Sheet Rev 0, 11/2005 (pdf 952kB)
- (About Data Sheets)
Features
- 100 MSPS guaranteed sampling rate (AD9446-100)
- 83.6 dBFS SNR with 30 MHz input
(3.8 V p-p input, 80 MSPS) - 82.6 dBFS SNR with 30 MHz input
(3.2 V p-p input, 80 MSPS) - 89 dBc SFDR with 30 MHz input
(3.2 V p-p input, 80 MSPS) - 95 dBFS 2-tone SFDR with 9.8 MHz and
10.8 MHz (100 MSPS) - 60 fsec rms jitter
- Excellent linearity
DNL = DNL = ±0.4 LSB typical
INL = ±3.0 LSB typical - 2.0 V p-p to 4.0 V p-p differential full-scale input
- Buffered analog inputs
- LVDS outputs (ANSI-644 compatible) or CMOS outputs
- Data format select (offset binary or twos complement)
- Output clock available
Diagrams
- Enlarge
- Other Diagrams
- Symbols and Footprints
Functional Block Diagram for AD9446
16-Bit, 80 MSPS / 100 MSPS A/D Converter
Other Diagrams for AD9446
16-Bit, 80 MSPS / 100 MSPS A/D Converter
100-ld TQFP/EP LVDS Mode Pin Configuration
100-ld TQFP/EP CMOS Mode Pin Configuration
Functional Block Diagram for AD9446
AD7352 - Differential Input, Dual, Simultaneous Sampling, 3 MSPS, 12-Bit, SAR ADC
AD7699 - 16-Bit, 8-Channel, 500 kSPS PulSAR ADC
AD7190 - 4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA
AD9230-11 - 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter
| Part# | Res | Throughput Rate | # of Inputs | Operating Pwr Diss |
|---|---|---|---|---|
| AD9261-10 | 16 | 160MSPS | 1 | 473mW |
| AD9460-105 | 16 | 105MSPS | 1 | 2.2W |
| AD9261 | 16 | 160MSPS | 1 | 473mW |
| AD9446-100 | 16 | 100MSPS | 1 | 2.8W |
| AD9461 | 16 | 130MSPS | 1 | 2.4W |
| AD9262 | 16 | 160MSPS | 2 | 773mW |
| AD9262-10 | 16 | 160MSPS |
