AD9235:  12-Bit, 20/40/65 MSPS, 3 V Analog-to-Digital Converter

The AD9235 is a family of monolithic, single 3 V supply, 12-bit, 20/40/65 MSPS analog-to-digital converters. This family features a high performance sample-and-hold amplifier (SHA) and voltage ...More

To drive this ADC in DC-coupled applications, we suggest ADA4938-1. To drive this ADC in AC-coupled applications, we suggest AD8351.

AD9235:  12-Bit, 20/40/65 MSPS, 3 V Analog-to-Digital Converter

Product Description

The AD9235 is a family of monolithic, single 3 V supply, 12-bit, 20/40/65 MSPS analog-to-digital converters. This family features a high performance sample-and-hold amplifier (SHA) and voltage reference. The AD9235 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy at 20/40/65 MSPS data rates and guarantee no missing codes over the full operating temperature range.

The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and offsets including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available analog-to-digital converters, the AD9235 is suitable for applications in communications, imaging, and medical ultrasound.

A single-ended clock input is used to control all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance. The digital output data is presented in straight binary or twos complement formats. An out-of-range (OTR) signal indicates an overflow condition that can be used with the most significant bit to determine low or high overflow.

Fabricated on an advanced CMOS process, the AD9235 is available in a 28-lead thin shrink small outline package (TSSOP) and a 32-lead chip scale package (LFCSP) and is specified over the industrial temperature range (-40°C to +85°C).

Features

  • Single +3 V Supply Operation (2.7 V to 3.6 V)
  • SNR = 70 dBc to Nyquist at 65 MSPS
  • SFDR = 85 dBc to Nyquist at 65 MSPS
  • Low Power: 300 mW at 65 MSPS
  • On-Chip Reference and SHA
  • Differential Input with 500 MHz Bandwidth
  • DNL of ±0.4 LSB
  • Flexible Analog Input: 1 V p-p to 2 V p-p
  • Offset Binary or Twos Complement Data Format
  • Clock Duty Cycle Stabilizer
  • Pin out Migration to Either AD9215, AD9236, AD9245

Diagrams

AD9235 Diagram
Functional Block Diagram for AD9235

Specifications

Resolution (Bits) 12bit
T-Put Rate 65MSPS
# Chan 1
Supply V Single(+3),Single(+3.3)
Pwr Diss (max) 205mW
Interface Par
Ain Range (2Vref) p-p,1 V p-p,2 V p-p
SNR (dB) 70.8dB
Pkg Type CSP,SOP

AD7356 - Differential Input, Dual, Simultaneous Sampling, 5 MSPS, 12-Bit, SAR ADC

AD7699 - 16-Bit, 8-Channel, 500 kSPS PulSAR ADC

AD7190 - 4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA

AD9230-11 - 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter

Subscribe to New Products Feed More
Part# Res Throughput Rate # of Inputs Operating Pwr Diss
AD9215-105 10 105MSPS 1 145mW
AD9215-65 10 65MSPS 1 114mW
AD9283-100 8 100MSPS 1 120mW
AD9237-65 12 65MSPS 1 270mW
AD9626-170 12 170MSPS 1 291mW
AD9235-65 12 65MSPS 1 350mW
AD9233-105 12 105MSPS 1