The AD5685R nanoDAC+TM is a quad, 14-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/˚C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2).
The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.
The AD5685R also incorporates a power-on-reset circuit and a RSTSEL pin that ensures the DAC outputs power up to zero-scale or midscale, and remain there until a valid write takes place. Each device contains a per-channel power-down feature that reduces the current consumption of the device to 4 uA at 3 V while in power-down mode.
The AD5685R employs a versatile SPI interface that operates at clock rates up to 50 MHz and includes a VLOGIC pin intended for 1.8V/ 3V/ 5V logic.
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|AD5686R/AD5685R/AD5684R: Quad, 16-/14-/12-Bit nanoDAC+ with 2 ppm/°C Reference, SPI Interface Data Sheet (Rev C, 05/2014) (pdf, 947 kB)||Data Sheets|
|AD5686R/AD5685R/AD5684R Quick Start Guide (Wiki Site)||User Guides||HTML|
Modern DACs and DAC Buffers Improve System Performance, Simplify Design
Analog Dialogue, By Padraic O'Reilly and Charly El-Khoury, Analog Devices, Inc. (Volume 46, March 2012)
|Glossary of EE Terms||Glossary||HTML|
Recommended Voltage/Current Output Driver for the AD5685
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