LTC6954

LAST TIME BUY

Low Phase Noise, Triple Output Clock Distribution Divider/Driver

Data Sheet (Rev. A) Product Selection Table
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Overview

  • Low Noise Clock Distribution: Suitable for High Speed/High Resolution ADC Clocking
  • Additive Jitter < 20fsRMS (12kHz to 20MHz)
  • Additive Jitter < 85fsRMS (10Hz to Nyquist)
  • 1.8GHz Maximum Input Frequency (LTC6954-1 When DELAY = 0)
  • 1.4GHz Maximum Input Frequency (LTC6954-1 When DELAY > 0, LTC6954-2, -3, -4)
  • EZSync™ Clock Synchronization Compatible
  • Three Independent, Low Noise Outputs
  • Four Output Combinations Available
  • Three Independent Programmable Dividers Covering All Integers From 1 to 63
  • Three Independent Programmable Delays Covering All Integers From 0 to 63
  • –40°C to 105°C Junction Temperature Range

The LTC6954 is a family of very low phase noise clock distribution parts. Each part has three outputs and each output has an individually programmable frequency divider and delay. There are four members of the family, differing in their output logic signal type:

LTC6954-1: Three LVPECL outputs

LTC6954-2: Two LVPECL and one LVDS/CMOS outputs

LTC6954-3: One LVPECL and two LVDS/CMOS outputs

LTC6954-4: Three LVDS/CMOS outputs

Each output is individually programmable to divide the input frequency by any integer from 1 to 63, and to delay each output by 0 to 63 input clock cycles. The output duty cycle is always 50%, regardless of the divide number. The LVDS/CMOS outputs are jumper selectable via the OUTxSEL pins to provide either an LVDS logic output or a CMOS logic output.

The LTC6954 also features Linear Technology’s EZSync system for perfect clock synchronization and alignment every time.

All device settings are controlled through an SPI-compatible serial port.

Applications

  • Clocking High Speed, High Resolution ADCs, DACs and Data Acquisition Systems
  • Low Jitter Clock Distribution
LTC6954
Low Phase Noise, Triple Output Clock Distribution Divider/Driver
Additive Phase Noise vs Offset Frequency, fIN = 622.08MHz, Mx[5:0] = 4, fOUTx = 155.52MHz Product Package 1
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Documentation

Data Sheet 1

Reliability Data 1

User Guide 1

Application Note 1

Technical Articles 1

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Software Resources

Evaluation Software 1

LTC6954 GUI

LTC6954_GUI is used to communicate with the LTC6954 clock driver. It uses the DC590 to translate between USB and SPI-compatible serial communications formats.

Hardware Ecosystem

Parts Product Life Cycle Description
Clock ICs 2
LTC6952
LAST TIME BUY Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B / JESD204C Support
LTC6951
LAST TIME BUY Ultralow Jitter Multi-Output Clock Synthesizer with Integrated VCO
Comparators 1
LTC6957
Low Phase Noise, Dual Output Buffer/Driver/Logic Converter
Phase-Locked Loop (PLL) Synthesizers 1
LTC6946
LAST TIME BUY Ultralow Noise and Spurious 0.37GHz to 6.39GHz Integer-N Synthesizer with Integrated VCO
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Tools & Simulations

Linduino 3

IBIS Model 4

Evaluation Kits

eval board
schematic 1
schematic 2
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schematic 4
schematic 5
schematic 6
DC1954A-A

LTC6954-1 Demo Board | Low Phase Noise, Triple Output Clock Distribution Divider/Driver, 3 LVPECL Outputs (Requires DC590 or DC2026)

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Product Details

Demonstration Circuit 1954A features the LTC6954, a Low Phase Noise, Triple Output Clock Distribution Divider/ Driver.


There are four options of the DC1954A, one for each version of the LTC6954. Table 1 summarizes the available DC1954A options.

eval board
schematic 7
schematic 8
DC1954A-C

LTC6954-3 Demo Board | Low Phase Noise, Triple Output Clock Distribution Divider/Driver, 1 LVPECL and 2 LVDS/CMOS outputs (Requires DC590 or DC2026)

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Product Details

Demonstration Circuit 1954A features the LTC6954, a Low Phase Noise, Triple Output Clock Distribution Divider/ Driver.


There are four options of the DC1954A, one for each version of the LTC6954. Table 1 summarizes the available DC1954A options.

eval board
schematic 9
schematic 10
schematic 11
schematic 12
schematic 13
schematic 14
DC1954A-D

LTC6954-4 Demo Board | Low Phase Noise, Triple Output Clock Distribution Divider/Driver, 3 LVDS/CMOS outputs (Requires DC590 or DC2026)

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Product Details

Demonstration Circuit 1954A features the LTC6954, a Low Phase Noise, Triple Output Clock Distribution Divider/ Driver.


There are four options of the DC1954A, one for each version of the LTC6954. Table 1 summarizes the available DC1954A options.

eval board
schematic 15
schematic 16
schematic 17
schematic 18
schematic 19
schematic 20
DC1954A-B

LTC6954-2 Demo Board | Low Phase Noise, Triple Output Clock Distribution Divider/Driver, 2 LVPECL and 1 LVDS/CMOS outputs (Requires DC590 or DC2026)

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Product Details

Demonstration Circuit 1954A features the LTC6954, a Low Phase Noise, Triple Output Clock Distribution Divider/ Driver.


There are four options of the DC1954A, one for each version of the LTC6954. Table 1 summarizes the available DC1954A options.
DC1954A-A
LTC6954-1 Demo Board | Low Phase Noise, Triple Output Clock Distribution Divider/Driver, 3 LVPECL Outputs (Requires DC590 or DC2026)
DC1954A-A Demo Board DC1954A-A Demo Board DC1954A-A Demo Board DC1954A-A Demo Board DC1954A - Demo Board Image DC1954A - Schematic
DC1954A-C
LTC6954-3 Demo Board | Low Phase Noise, Triple Output Clock Distribution Divider/Driver, 1 LVPECL and 2 LVDS/CMOS outputs (Requires DC590 or DC2026)
DC1954A - Demo Board Image DC1954A - Schematic
DC1954A-D
LTC6954-4 Demo Board | Low Phase Noise, Triple Output Clock Distribution Divider/Driver, 3 LVDS/CMOS outputs (Requires DC590 or DC2026)
DC1954A-D Demo Board DC1954A-D Demo Board DC1954A-D Demo Board DC1954A-D Demo Board DC1954A - Demo Board Image DC1954A - Schematic
DC1954A-B
LTC6954-2 Demo Board | Low Phase Noise, Triple Output Clock Distribution Divider/Driver, 2 LVPECL and 1 LVDS/CMOS outputs (Requires DC590 or DC2026)
DC1954A-B Demo Board DC1954A-B Demo Board DC1954A-B Demo Board DC1954A-B Demo Board DC1954A - Demo Board Image DC1954A - Schematic

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