CN0328

For industrial control modules, standard analog output voltage and current ranges include ±5 V, ±10 V, 0 V to +5 V, 0 V to +10 V, +4 mA to +20 mA, and 0 mA to +20 mA. The AD5755-1 provides all of these ranges in a high precision, fully integrated, low cost, single-chip solution. A 20% overrange feature is also available for the voltage output ranges. Each DAC channel has a gain (M) and offset (C) register, which allow trimming the gain and offset errors of the entire signal chain.

The current and voltage outputs are available on separate pins, and only one is active at any given time, thus allowing for both output pins to be tied together and connected to a single terminal. When the current output is enabled, the voltage output is in tristate mode, and when the voltage output is enabled, the current output is in tristate mode. Analog outputs are short-circuit and open-circuit protected.

The AD5755-1 allows for an internal or external precision, current setting resistor for the voltage-to-current conversion circuitry, as shown in Figure 3. The stability of the output current value over temperature is dependent on the stability of the value of R_SET. As a method of improving the stability of the output current over temperature, an external 15 kΩ low drift resistor can be connected to the R_{SET_X} pin of the AD5755-1 instead of the internal resistor. The external resistor is selected via the DAC control register. Accuracy measurements were evaluated using both options, as described in the Circuit Evaluation and Test section.

Precision Voltage Reference Selection

The AD5755-1 has an on-chip 10 ppm/°C (maximum) reference. For higher performance over temperature, this design uses an ADR02 reference with a 3 ppm/°C maximum drift (B grade, SOIC package). The voltage applied to the reference input is used to provide a buffered reference for the DAC core. Therefore, any error in the voltage reference is reflected in the outputs.

The ADR02 is a 5 V precision reference that allows for an input voltage of up to 36 V. It has a 0.06% maximum accuracy error and a 3 ppm/°C maximum temperature drift (B grade, SOIC package). This drift contributes approximately 0.02% error across the industrial temperature range. It has a long-term drift of 50 ppm (typical) and a 0.1 Hz to 10 Hz noise specification of 10 μV p-p (typical).

Dynamic Power Control

The AD5755-1 contains integrated dynamic power control using a dc-to-dc boost converter circuit, allowing reduced power consumption in the current output mode. Most PLC current output circuits used a fixed voltage source to meet the output voltage compliance requirements across the full range of load resistor values. For example, a 4 mA to 20 mA loop with 750 Ω load, when driving 20 mA, requires a compliance voltage of at least 15 V. However, when driving 20 mA into a 50 Ω load, only 1 V compliance is required. If the 15 V compliance is kept when driving the 50 Ω load, a power dissipation of 20 mA × 14 V = 280 mW is wasted.

The AD5755-1 circuitry eliminates this power loss by sensing the output voltage and regulating the compliance voltage to allow only a small headroom voltage regardless of the load resistance. The AD5755-1 is capable of driving up to 24 mA into a 1 kΩ load.

DC-to-DC Converter Operation

The AD5755-1 contains four independent dc-to-dc converters. These are used to provide dynamic control of the VBOOST_X supply voltage for each channel (see Figure 3). Figure 4 shows the discrete components needed for the dc-to-dc circuitry.

It is recommended to place a 10 Ω, 100 nF low-pass RC filter after C_DCDC. This consumes a small amount of power but reduces the amount of ripple on the V_{BOOST_X} supply.

The dc-to-dc converters use a constant frequency, peak current mode control scheme to step up an AV_CC input of 4.5 V to 5.5 V to drive the AD5755-1 output channel. These are designed to operate in discontinuous conduction mode (DCM) with a duty cycle of <90% typical.

When a channel current output is enabled, the converter regulates the V_{BOOST_X} supply to 7.4 V (±5%) or (I_{OUT_X} × R_LOAD + headroom), whichever is greater. In the current output mode with the output disabled, the converter regulates the V_{BOOST_X} supply to 7.4 V (±5%). In the voltage output mode with the output disabled, the converter regulates the V_{BOOST_X} supply to +15 V (±5%). Full details of the dc-to-dc converter operation can be found in the AD5755-1 data sheet.

HART Coupling

The AD5755-1 has four CHART pins, corresponding to each of the four output channels. A HART signal can be coupled into these pins and appears on the corresponding current output if that output is enabled. Table 1 shows the recommended input voltages for the HART signal at the CHART pin. If these voltages are used, the current output meets the HART amplitude specifications. Figure 5 shows the recommended circuit for attenuating and coupling the HART signals to the AD5755-1 HART inputs.

A minimum capacitance of C1 + C2 is required to ensure that the 1.2 kHz and 2.2 kHz HART frequencies are not significantly attenuated at the output. The recommended values are C1 = 22 nF, C2 = 47 nF. Digitally controlling the slew rate of the output is necessary to meet the analog rate of change requirements for HART.

Digital Slew Rate Control

The slew rate control feature of the AD5755-1 allows the user to control the rate at which the output value changes. This feature is available on both the current and voltage outputs. With the slew rate control feature disabled, the output value changes at a rate limited by the output drive circuitry and the attached load. With the slew rate feature enabled via the SREN bit of the slew rate control register, the output slews between two levels at a rate defined by the SR_CLOCK and SR_STEP parameters accessible via the slew rate control register.

The following equation describes the slew rate as a function of the step size, the update clock frequency, and the LSB size:

where: Slew Time is expressed in seconds.

Output Change is expressed in amps for I_{OUT_X} or volts for V_{OUT_X}.

See the AD5755-1 data sheet for further details.

Transient Voltage Protection

The AD5755-1 contains ESD protection diodes that prevent damage from normal handling. However, the industrial control environment can subject I/O circuits to much higher transients. To protect the AD5755-1 from excessively high voltage transients, a 24 V transient voltage suppressor (TVS) is placed on the I_OUT/V_OUT connection, as shown in Figure 6. For added protection, clamping diodes are connected from the I_{OUT_X}/V_{OUT_X} pin to the V_{BOOST_x} and AV_SS power supply pins. A 5 kΩ current limiting resistor is also placed in series with the +V_{SENSE_X} input. This is to limit the current to an acceptable level during a transient event. The recommended external band-pass filter for the AD5700 HART modem includes a 150 kΩ resistor that limits the current to a sufficiently low level to adhere to intrinsic safety requirements. In this case, the input has higher transient voltage protection and, therefore, does not require additional protection circuitry, even in the most demanding industrial environments.

Input Power Protection

A regulated 24 V dc supply is connected to the board through a 2-wire or 3-wire interface. This supply must be protected against faults and electromagnetic interference (EMI) as shown in Figure 7.

VR1, VR2, VR3, and VR4 are piezoresistors, and F1 is a positive temperature coefficient resistor. This circuit ensures that the evaluation system survives any interference that may be generated on the power ports. See PLC Evaluation Board Simplifies Design of Industrial Process Control Systems, Analog Dialogue 43-04, April 2009, for more details.

The input 24 V supply drives the ADP1621 PWM step-up controller. The controller drives the 3-tap transformer, which provides isolation and generates AVDD (+15 V), AVSS (−15 V), and AVCC (+5 V). The feedback is provided via the PS2801-1 optocoupler.

The ADP1621 supply input voltage range is 2.9 V to 5.5 V, but higher input voltages are possible with the use of a small-signal NPN pass transistor or a single resistor. The switching frequency is set by an external resistor over a range of 100 kHz to 1.5 MHz.

The AVDD, AVSS and AVCC rail voltages are shown in Table 2 under various load conditions.

An alternative to using the isolated switching power supply circuit is provided by the J5 and J11 terminal blocks. If these terminal blocks are used, remove LK2 to LK4.

Digital Isolation

The ADuM3481 and ADuM3482 are 3.75 kV quad channel digital isolators in small 20-lead SSOP packages (7.2 mm × 7.8 mm). The isolator core operates between 3.0 V and 5.5 V, whereas the I/O supply can range from 1.8 V to 5.5 V. These devices can be used to interface directly with 1.8 V logic. The ADuM3481 in this design is used to isolate the SPI signals for the AD5755-1 while the ADuM3482 is used to isolate the UART signals for the AD5700-1 HART modem. The dual channel ADuM3210 is used to isolate the address lines of the  ADG759 quad channel mux.

Further information on iCoupler products is available at www.analog.com/iCoupler. Complete schematics, bill of materials, and layout files for the EVAL-CN0328-SDPZ board can be found in the CN-0328 design support package.