Overview

Design Resources

Design & Integration File

  • Schematic
  • Bill of Materials
  • Gerber Files
  • Assembly Drawing
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Evaluation Hardware

Part Numbers with "Z" indicate RoHS Compliance. Boards checked are needed to evaluate this circuit.

  • CFTL-CN0134-EVALZ ($249.31) Circuit Evaluation board designed to evaluate CN0134.
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Features & Benefits

  • Direct conversion broadband transmitter
  • Functions from 500 MHz to 4.4 GHz
  • Excellent phase noise reduces errors

Circuit Function & Benefits

This circuit is a complete implementation of the analog portion of a broadband direct conversion transmitter (analog baseband in, RF out). RF frequencies from 500 MHz to 4.4 GHz are supported through the use of a PLL with a broadband integrated voltage controlled oscillator (VCO). Harmonic filtering of the LO from the PLL ensures excellent quadrature accuracy.

Low noise LDOs ensure that the power management scheme has no adverse impact on phase noise and EVM. This combination of components represents industry-leading direct conversion transmitter performance over a frequency range of 500 MHz to 4.4 GHz.

Figure 1: Direct Conversion Transmitter (Simplified Schematic: All Connections and Decoupling Not Shown)

Circuit Description

The circuit shown in Figure 1 utilizes the ADF4350, a fully integrated fractional-N PLL IC, and the ADL5375 wideband transmit modulator. The ADF4350 provides the local oscillator (LO) signal for the ADL5375 transmit quadrature modulator, which upconverts analog I/Q signals to RF. Taken together, the two devices provide a wideband baseband IQ to RF transmit solution. The ADF4350 is powered off the ultralow noise 3.3 V ADP150 regulator for optimal LO phase noise performance. The ADL5375 is powered off a 5 V ADP3334 LDO. The ADP150 LDO has an output voltage noise of only 9 μV rms and helps to optimize VCO phase noise and reduce the impact of VCO pushing (equivalent to power supply rejection).

Figure 2: Evaluation Board for CN-0134 Direct Conversion Transmitter

 

Filtering is required on the ADF4350 RF outputs to attenuate harmonic levels so as to minimize errors in the quadrature generation block of the ADL5375. From measurement and simulation, the odd order harmonics contribute more than even order harmonics to quadrature error and, if attenuated to below −30 dBc, results in sideband suppression performance of −40 dBc or better. The ADF4350’s 2nd harmonic (2H) and 3rd harmonic (3H) levels are as given in the data sheet and shown in Table 1. To get the 3rd harmonic below -30 dBc, approximately 20 dB of attenuation is required.

Table 1. ADF4350 RF Output Harmonic Levels Unfiltered
Harmonic Content Measurement Output
Second −19 dBc Fundamental VCO output
Third −13 dBc Fundamental VCO output
Second −20 dBc Divided VCO output
Third −10 dBc Divided VCO output

 

This circuit gives four different filter options to cover four different bands. The filters were designed for a 100 Ω differential input (ADF4350 RF outputs with appropriate matching) and 50 Ω differential output (ADL5375 LOIN differential impedance). A Chebyshev response was used for optimal filter roll-off at the expense of increased pass-band ripple.

The filter schematic is shown in Figure 3. This topology allows the use of either a fully differential filter to minimize component count, a single-ended filter for each output, or a combination of the two. It was determined that for higher frequencies (>2 GHz) two single-ended filters gave the best performance because the series inductor values are twice the value compared to a fully differential filter and, hence, the impact of component parasitics is reduced. For lower frequencies (<2 GHz), a fully differential filter provides adequate results.

Figure 3: ADF4350 RF Output Filter Schematic

 

The ADF4350 output match consists of the ZBIAS pull-up and, to a lesser extent, the decoupling capacitors on the supply node. To get a broadband match it is recommended to use either a resistive load (ZBIAS = 50 Ω) or a resistive in parallel with a reactive load for ZBIAS. The latter gives slightly higher output power, depending on the inductor chosen. Note that it is possible to place the parallel resistor as a differential component (i.e. 100 Ω) in position C1c to minimize board space. This is done in filter type c, described in Table 2.

The filter should be designed with a cutoff approximately 1.2 to 1.5 times the highest frequency in the band of interest. This allows margin in the design, as typically the cutoff will be lower than designed due to parasitics. The effect of PCB parasitics can be simulated in an EM simulation tool for improved accuracy.

Table 2. ADF4350 RF Output Filter Component Values (DNI = Do Not Insert)
Filter Type
Frequency Range (MHz)

ZBIAS

L1 (nH)
L2 (nH)
C1a (pF)
C1c (pF)
C2a (pF)
C2c (pF)
C3a (pF)
C3c (pF)
A
500–1300
27 nH|| 50 Ω
3.9
3.9
DNI
4.7
DNI
5.6
DNI
3.3
B
850–2450
19 nH || (100 Ω in Position C1c)
2.7
2.7
3.3
100 Ω
4.7
DNI
3.3
DNI
C
1250–2800
50 Ω
0 Ω
3.6
DNI
DNI
2.2
DNI
1.5
DNI
D
2800–4400
3.9 nH
0 Ω
0 Ω
DNI
DNI
DNI
DNI
DNI
DNI

 

As can be seen from Table 2, at lower frequencies below 1250 MHz, a 5th order filter is required. For 1.25 GHz to 2.8 GHz, 3rd order filtering is sufficient. For frequencies above 2.8 GHz, no filtering is required, as the harmonic levels are sufficiently low to meet sideband suppression specifications.

Figure 4: Sideband Suppression for Filter b, 850 MHz to 2450 MHz

 

A sweep of sideband suppression vs. frequency is shown in Figure 4 for the circuit using Filter b (850 MHz to 2450 MHz). In this sweep, the test conditions were the following: baseband I/Q amplitude = 1 V p-p differential sine waves in quadrature with a 500 mV (ADL5375-05) dc bias; baseband I/Q frequency (fBB) = 1 MHz.

Error vector magnitude (EVM) is a measure of the quality of the performance of a digital transmitter or receiver and is a measure of the deviation of the actual constellation points from their ideal locations, due to both magnitude and phase errors. This is shown in Figure 5.

EVM measurements are given in Table 3 comparing results with and without the filter. In this case the baseband I/Q signals were generated using 3GPP test model 4 using a Rhode and Schwarz AMIQ I/Q Modulation Generator with differential I and Q analog outputs. Filter b was also used. A block diagram of the test setup for EVM is given in Figure 6.

Table 3. Single-Carrier W-CDMA Composite EVM Results Comparing Filter vs. No Filter on ADF4350 RF Outputs (Measured As Per 3GPP Specification Test Model 4)
Frequency (MHz)
Composite EVM No LO Filtering
Composite EVM with LO Filtering, Filter C
Modulator Output Power (dBm)
2140
3.50%
1.80%
−7
1800
3.40%
1.50%
−7
900
3.30%
0.90%
−7

 

Figure 5: EVM Plot

 

Figure 6: EVM Measurement Setup (Simplified Diagram)

 

Adjacent channel leakage ratio (ACLR) is a measure of the power in adjacent channels relative to the main channel power and is specified in dBc.

The LO phase noise and the linearity of the modulator are the main contributors to ACLR. The ACLR test setup is the same as for EVM with the exception that coaxial filters were placed on the I/Q outputs of the signal generator to reduce aliasing products.

In addition to the improvement in sideband suppression and EVM, there is also a performance benefit to driving the ADL5375 LO inputs differentially. This improves modulator OIP2 performance by 2 dB to 5 dB, compared with single-ended LO drive. Note that most external VCOs only come with a single-ended output, so using the differential outputs on the ADF4350 provides a benefit over an external VCO in this case. Figure 7 shows sideband suppression results using an 850 MHz to 2450 MHz filter (filter b).

Figure 7: Sideband Suppression Results for 850 MHz to 2450 MHz Filter b

 

A complete design support package for this circuit note can be found at http://www.analog.com/CN0134-DesignSupport.

Common Variations

It is possible to use the auxiliary outputs on the ADF4350 to switch between two filter types where wideband operation beyond that possible with one single filter is required. This is shown in Figure 8. An RF double-pole, 4-throw switch (DP4T) is used to select the differential outputs of either Filter 1 or Filter 2.

Figure 8: Application Diagram Showing Possibility of Filter Switching Using the ADF4350 Main and Auxiliary Outputs

Circuit Evaluation & Test

The CFTL-0134-EVALZ evaluation board contains the circuit described in circuit note CN-0134, allowing for the quick setup and evaluation of the circuit’s performance. The control software for the CFTL-0134-EVALZ board uses the standard ADF4350 programming software, located on the CD that accompanies the evaluation board.


Equipment Needed

A standard PC running Windows® XP, Windows Vista (32-bit), or Windows 7 (32-bit) with USB port, the CFTL-0134-EVALZ circuit evaluation board, and the ADF4350 programming software, power supplies, I-Q signal source, such as a Rhode & Schwarz AMIQ, and a spectrum analyzer such as the Rhode & Schwartz FSQ8. For additional details see the evaluation guide (CN0134-EvalGuide-RevA.pdf), which is contained in the design support package (http://www.analog.com/CN0134-DesignSupport), and the ADF4350 and ADL5375 data sheets.


Getting Started

See CN0134-EvalGuide-RevA.pdf for software installation and test setup. The documentation also includes the block diagram, the application schematic, the bill of materials, and the layout and assembly information. Also see the AD4350 and ADL5375 data sheets for additional details.


Functional Block Diagram

See Figure 1 and Figure 6 in circuit note CN-0134 and the CN0134-EvalGuide-RevA.pdf, Wideband TX Modulator Solution user document in the design support package.


Setup and Test

See circuit note CN-0134 and the CN0134-EvalGuide-RevA.pdf, Wideband TX Modulator Solution user document.