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ADSP-BF542M/BF544M/BF547M/BF548M/BF549M Blackfin Processor IBIS Datafile 400-Ball CSP BGA Package (3/2010)
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IBIS Model
ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor IBIS Datafile 400-Ball CSP BGA Package (3/2010)
242 kBB
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Features
- Media Transceiver (MXVR) for connection to a MOST® automotive multi-media network
- Lockbox™ Secure Technology: Hardware-enabled security for code and content protection.
- Two independent DMA controllers
- Multimedia: Multiple Enhanced Parallel Peripheral Interfaces (EPPI), Pixel Compositor hardware accelerator
- Human Interface: 18/24-bit LCD Controller 32-bit Up/Down counter/Thumbwheel interface, 8x8 Keypad interface
- Blackfin® Processor Core with up to 533Mhz (1066 MMACS) performance
- Connectivity: High Speed USB OTG , Host DMA, UARTs, SPORTs, SPI, TWI, and CAN
- Expansion: SD/SDIO and ATAPI-6 Controllers
- Synchronous interface for DDR or Mobile DDR connectivity (See data sheet ordering guide for specific product information)
- Asynchronous memory interface for SRAM, EEPROM, NAND/NOR, Flash connectivity
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The ADSP-BF549 processors were specifically designed to meet the needs of convergent automotive multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. For applications that require additional external memory, the ADSP-BF549 family provides product variants specifically designed to interface to either Standard DDR1 or 1.8V Low-Power DDR memory devices.
IP protection has become a necessary part of today’s embedded applications. The ADSP-BF54x provides a security scheme that balances flexibility and upgradeability with performance through the inclusion of a firmware based solution including OTP memory to enable users to implement private keys for secure access to program code.
The ADSP-BF549 provides peripheral flexibility to complement its high performance processing. These rich system level peripherals are well suited for Advanced Vehicle Infotainment and multimedia applications where multiple standards are prevalent and system performance is required.
To enhance connectivity, a High Speed USB On-the-Go (HS USB OTG) module with Integrated PHY has been integrated along with an 8/16-bit Host DMA Interface. These system level peripherals, along with standard serial connections provided by multiple on-chip SPORT, SPI, UART, TWI, and CAN interfaces, provide glue-less interfaces to multiple off chip devices including consumer and communication products, Bluetooth, and other application specific interfaces. This level of integration is perfect for the emerging and constantly changing products and standards in the car infotainment and multimedia segments.
For interfacing off chip to storage media including hard drives, CD/DVD-drives, and NAND Flash products, the ADSP-BF549 has implemented a SD/SDIO controller, ATAPI-6 controller, and an 8/16-bit NAND flash controller.
Many multimedia enhancements have also been included on the ADSP-BF549 to offload processor MIPS through hardware integration, expand display capabilities, and shorten customer development time. The multiple Enhanced Parallel Peripheral Interfaces that support ITU-R BT.656 Video Formats now can also drive 18/24-bit LCD displays. A Hardware acceleration block, the Pixel Compositor, has been developed to execute overlay, color conversion and alpha blending. This block significantly reduces processor core overhead associated with software RGB-YUV color conversion and alpha blending.
For human interface capability, the ADSP-BF549 provides a 32-bit up/down counter that can sense 2-bit quadrature or binary codes as typically emitted by industrial drives or manual thumb wheels. An 8x8 Keypad interface is also included.
3
B
IBIS Model
ADSP-BF542M/BF544M/BF547M/BF548M/BF549M Blackfin Processor IBIS Datafile 400-Ball CSP BGA Package (3/2010)
240 kBB
IBIS Model
ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor IBIS Datafile 400-Ball CSP BGA Package (3/2010)
242 kBB
Ask a Question
Submit your question below and we will return the best answer from ADI’s knowledge database:
Search
Other places you can find help
Support
Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
Visit the ADI Support Page
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ADSP-BF549
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Data Sheet 1
User Guide 2
Application Note 50
EE-257: A Boot Compression/Decompression Algorithm for Blackfin® Processors (Rev.1)
EE-269: A Beginner’s Guide to Ethernet 802.3 (Rev.1)
EE-110: A Quick Primer on ELF and DWARF File Formats
EE-271: Using Cache Memory on Blackfin® Processors (Rev.2)
EE-308: Estimating and Optimizing Booting Time for Blackfin® Processors (Rev.1)
EE-294: Energy-Aware Programming on Blackfin Processors (Rev.1)
EE-128: DSP in C++: Calling Assembly Class Member Functions From C++
EE-347: Formatted Print to a UART Terminal with Blackfin® Processors (Rev.3)
EE-185: Fast Floating-Point Arithmetic Emulation on Blackfin® Processors (Rev.4)
EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)
EE-281: Hardware Design Checklist for the Blackfin® Processors (Rev.2)
EE-341: Expert Pin Multiplexing Plug-in for Blackfin® Processors (Rev.3)
EE-311: VisualDSP++® Flash Programmer API for Blackfin® Processors (Rev.1)
EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)
EE-344: Using the NAND Flash Controller on Blackfin Processors (Rev.1)
EE-301: Video Templates for Developing Multimedia Applications on Blackfin® Processors (Rev.1)
EE-334: Using Blackfin® Processor Hibernate State for Low Standby Power (Rev.1)
EE-331: UART Enhancements on ADSP-BF54x Blackfin® Processors (Rev.1)
EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)
EE-324: System Optimization Techniques for Blackfin® Processors (Rev.1)
EE-303: Using VisualDSP++® Thread-Safe Libraries with a Third-Party RTOS (Rev.1)
EE-192: Using C To Create Interrupt-Driven Systems On Blackfin® Processors
EE-149: Tuning C Source Code for the Blackfin® Processor Compiler
EE-276: Video Framework Considerations for Image Processing on Blackfin® Processors (Rev.1)
EE-304: Using the Blackfin® Processor SPORT to Emulate a SPI Interface (Rev.1)
EE-339: Using External Switching Regulators with Blackfin® Processors (Rev.1)
EE-309: Power Mode Transition Times of Blackfin® Processors (Rev.1)
EE-350: Seamlessly Interfacing MEMS Microphones with Blackfin Processors (Rev.1)
EE-336: Putting ADSP-BF54x Blackfin® Processor Booting into Practice (Rev.1)
EE-104: Setting Up Streams with the VisualDSP Debugger
EE-236: Real-Time Solutions Using Mixed-Signal Front-End Devices with the Blackfin® Processor (Rev.1)
EE-183: Rational Sample Rate Conversion with Blackfin® Processors (Rev.5)
EE-306: PGO Linker - A Code Layout Tool for Blackfin Processors (Rev.1)
EE-234: Interfacing T1/E1 Transceivers/Framers to Blackfin® Processors via the Serial Port (Rev.1)
EE-337: Host DMA Port on ADSP-BF52x and ADSP-BF54x Blackfin® Processors (Rev.1)
EE-325: Interfacing Atmel Fingerprint Sensor AT77C104B with Blackfin® Processors (Rev.1)
EE-302: Interfacing ADSP-BF53x Blackfin® Processors to NAND FLASH Memory (Rev.1)
EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)
EE-333: Interfacing Blackfin® Processors to Winbond W25X16 SPI Flash Devices (Rev.1)
EE-335: Interfacing SD Cards with Blackfin Processors (Rev.1)
EE-213: Host Communication via the Asynchronous Memory Interface for Blackfin® Processors (Rev.2)
EE-307: Blackfin® Processor Troubleshooting Tips Using VisualDSP++® Tools (Rev.1)
EE-235: An Introduction to Scripting in VisualDSP++® (Rev.1)
EE-197: ADSP-BF531/532/533 Blackfin® Processor Multi-cycle Instructions and Latencies
EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10)
EE-112: Class Implementation in Analog C++
EE-326: Blackfin® Processor and SDRAM Technology (Rev.2)
EE-312: Building Complex VDK/LwIP Applications Using Blackfin® Processors (Rev.2)
EE-204: Blackfin® Processor SCCB Software Interface for Configuring I2C® Slave Devices (Rev.2)
EE-340: Connecting SHARC® and Blackfin® Processors over SPI (Rev.1)
Processor Manual 3
Product Highlight 1
Software Manual 11
VisualDSP++® 5.0 Users Guide (Rev.3.0)
VisualDSP++® 5.0 Quick Installation Reference Card (Rev.3.1)
VisualDSP++® 5.0 Licensing Guide (Rev.1.4)
VisualDSP++® 5.0 Device Drivers and System Services Manual for Blackfin Processors (Rev.4.3)
VisualDSP++® 5.0 C/C++ Compiler and Library Manual for Blackfin Processors (Rev.5.4)
VisualDSP++® 5.0 Loader and Utilities Manual (Rev.2.5)
VisualDSP++® 5.0 Product Release Bulletin (Rev.3.0)
VisualDSP++® 5.0 Assembler and Preprocessor Manual (Rev.3.4)
VisualDSP++® 5.0 Getting Started Guide (Rev.3.0)
VisualDSP++® 5.0 Kernel (VDK) Users Guide (Rev.3.5)
VisualDSP++® 5.0 Linker and Utilities Manual (Rev.3.5)
Emulator Manual 3
Integrated Circuit Anomaly 1
Legacy Evaluation Kit Manual 2
Product Highlight 1
Circuit Note 1
Product Selection Guide 1
Software & Part Ecosystem
Software & Tools Anomaly
Middleware
Lightweight TCP/IP (lwIP) Stack
Software Development Tools
CrossCore® Embedded Studio
Looking for Evaluation Software? You can find it here
Evaluation Kits 3
EMULATOR-ADSP
Low Cost ICE-1000 and High Performance ICE-2000 USB-based JTAG Emulators
Features and Benefits
- JTAG/SWD support for Blackfin, Blackfin+, SHARC and multi-core SHARC+ with ARM
- Plug-n-Play, USB 2.0 compliant
- USB bus-powered device
- Windows® 8.1, Window 7 compatible
- Multiple processor I/O voltage support: 1.8V, 2.5V, and 3.3V
- Multiprocessor support
- JTAG/SWD clock operation of 5 MHz on the ICE-1000
- JTAG/SWD clock operation up to 46 MHZ on the ICE-2000
- Multi-colored LED for enhanced status indication
- Software controlled target reset to support remote debug
Product Detail
New debug feature added for the ICE-1000/ICE-2000:
- Coresight Serial Wire Debug (SWD)
EMULATOR-USB & HP USB ICE
USB-Based Emulator and High Performance USB-Based Emulator
Features and Benefits
- Full speed USB 1.1 interface enabling download speeds of up to 150 KB/Sec (ADZS-USB-ICE) or High speed USB 2.0 interface enabling download speeds of up to 1.5MB/sec (ADZS-HPUSB-ICE)
- Background Telemetry Channel (BTC) support enabling non-intrusive data exchange at up to 2.0 MB/sec (ADZS-HPUSB-ICE only)
- 1.8V, 2.5V, and 3.3V compliant and tolerant
- Support for all ADI JTAG processors and DSPs
- 5V tolerant and 3.3V compliant for 5V processors and DSPs
- Multiprocessor support
- 14-pin JTAG connector
- 3-meter USB cable for difficult-to-reach targets
- CE-certified
Product Detail
The plug-and-play architecture of USB allows the emulators to be automatically detected and configured by the host operating system. It can also be connected to and disconnected from the host without opening the PC or turning off the power to the PC. A 3-meter cable is included to connect the emulators to the host PC, thus providing abundant accessibility to hard to reach targets.
The HP USB-based emulator also supports the Background
Telemetry Channel (BTC), a non-intrusive method
for exchanging data between the host and target
application without affecting the target system's
real-time characteristics.
Part Number:
USB-Based Emulator
Part Number: ADZS-USB-ICE
High Performance USB-Based Emulator
Part Number: ADZS-HPUSB-ICE
Tools Support:
Tel: 1-800-ANALOGD (262-5643)
Contact Support
For additional information, contact your local Analog Devices Sales Office or Distributor.
Resources
EVAL-BF548-EZLITE
The ADSP-BF548 EZ-Kit Lite evaluation hardware provides a low-cost hardware solution for evaluating the ADSP-BF54x Blackfin processor family.
Features and Benefits
- ADSP-BF548 Processor: 400 Ball mBGA, 600MHz; 25 MHz CLKIN oscillator
- DDR SDRAM: 64 MB (8M x 16) Micron MT46V32M16
- BURST Flash: 16 MB Numonyx PC28F128P33T85A
- NAND Flash: 2 Gb Numonyx NAND02
- SPI Flash: 16 Mbit Numonyx M25P16
- Hard Drive: Toshiba MK4032GAX 40GB 2.5” drive
- AC’97 CODEC: AD1980 5.1 Surround Codec
- Keypad: ACT Components, ACT-07-30008-000-R 4x4 Keypad assembly
- Thumbwheel: CTS Corp 290UAB0R201B2, Rotary Encoder
- UART: ADM3202 RS-232 line driver/receiver; DB9 female connector
- USB Debug Agent and JTAG Header
- Connectors: HS USB OTG; SD Memory; CAN (2); HOST; Expansion Interface (3); STAMP Interface (7)
Product Detail
The EZ-KIT Lite includes an ADSP-BF548 Blackfin Processor desktop evaluation board along with an evaluation suite of the VisualDSP++® development and debugging environment, including the C/C++ compiler, assembler, and linker. The evaluation suite of VisualDSP++ is designed to be used with the EZ-KIT Lite only.
The EZ-KIT Lite ships with a 4x4 Keypad, Optical Thumbwheel, QVGA Touch Screen LCD and a 40 Gigabyte Hard Drive.
Ordering Information
Part number: ADZS-BF548-EZLITE
CROSSCORE® Tools Support
Tel: 1.800.ANALOGD
Contact Support
Resources
Evaluation Kits3
Tools & Simulations 3
BSDL Model File 1
BSDL Model File
IBIS Model 2
Blackfin Processors Software and Tools
