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ADSP-21369: Sharc Processor Data Sheet (Rev. H)3/26/2019PDF1 M
ADSP-21369
High-Performance 32-bit Floating-Point SHARC Processor for General Purpose Applications
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Overview
Features and Benefits
- 400MHz SIMD SHARC Core, capable of 2.4 GFLOPS peak performance
- 2Mbits SRAM; 6 Mbits customer-definable ROM
- High bandwidth, 32-bit external memory interface supporting glue-less interface to SDRAM, SRAM, and FLASH
- Digital Audio Interface (DAI) enabling user-definable access to system peripherals including 8 serial ports (SPORTs), S/PDIF Tx/Rx, 8-channel asynchronous sample rate converter, and 4 precision clock generators.
- Digital Peripheral Interface (DPI) enabling user-definable access to system peripherals including 2 SPI-compatible ports, 2 UARTs, 3 full-featured timers, and a two-wire interface compliant to the I2C standard.
- 34 zero-overhead DMA channels
- 16 Pulse Width Modulation (PWM) channels
- 208-lead LQFP-EP and 256-ball SBGA packages
- Commercial and industrial temperature ranges
- Maximum core performance is reduced for LQFP package
Product Details
The third generation of SHARC® Processors offers increased performance, audio and application-focused peripherals, and new memory configurations. The ADSP-21369 increases performance to 400MHz while simplifying algorithm development with the integration of a high-bandwidth and very flexible external memory interface. The ADSP-21369 is based on a single-instruction, multiple-data (SIMD) core which supports both 32-bit fixed-point and 32-/40-bit floating point arithmetic formats and is completely code-compatible with all prior SHARC Processors allowing for maximum reuse of legacy code.
The ADSP-21369 increases the amount of on-chip memory to 2Mb SRAM and 6Mb ROM while integrating a variety of audio-specific and general purpose peripherals. Peripherals such as an all digital S/PDIF transmitter/receiver, 8-channel asynchronous sample rate converter, 8 high-speed serial ports, 4 precision clock generators, and multiple serial interfaces combine to ensure the ADSP-21369 maximizes system throughput while minimizing system bill of materials costs.
Product Categories
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (3)
Documentation & Resources
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EE-112: Class Implementation in Analog C++11/14/2016PDF31 K
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EE-356: Emulator and Evaluation Hardware Troubleshooting Guide for CCES Users (Rev. 2)2/14/2015PDF779 K
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EE-355: Expert In-Circuit FLASH Programmer for SHARC® Processors (Rev. 1)8/20/2012PDF1045 kB
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EE-243: Using the Expert DAI for SHARC® Processors (Rev. 7)7/6/2010PDF337 kB
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EE-345: Boot Kernel Customization and Firmware Upgradeability on SHARC Processors® (Rev. 1)10/6/2009PDF331 kB
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EE-332: Cycle Counting and Profiling (Rev. 2)8/18/2009PDF142 kB
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EE-299: Estimating Power Dissipation for ADSP-21368 SHARC Processors6/22/2009PDF188 kB
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EE-322: Expert Code Generator for SHARC® Processors (Rev. 5)6/15/2009PDF742 kB
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EE-340: Connecting SHARC® and Blackfin® Processors over SPI (Rev. 1)5/8/2009PDF209 kB
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EE-320: Implementing an Ogg Vorbis Decoder on SHARC® Processors (Rev. 1)6/26/2008PDF731 kB
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EE-323: Implementing Dynamically Loaded Software Modules (Rev. 1)3/8/2008PDF0
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EE-329: Running FAT16 File Systems and DOS Commands on SHARC® Processors (Rev. 1)10/4/2007PDF868 kB
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EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev. 1)8/31/2007PDF276 kB
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EE-266: Programming S/PDIF on ADSP-2136x and ADSP-21371 SHARC® Processors (Rev. 2)8/28/2007PDF1147 kB
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EE-231: In-Circuit Programming of an SPI Flash with SHARC® Processors (Rev. 2)8/27/2007PDF74 kB
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EE-328: Migrating from ADSP-2106x/2116x to ADSP-2126x/2136x/2137x SHARC® Processors (Rev. 1)7/27/2007PDF101 kB
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EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev. 14)5/21/2007PDF183 kB
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EE-313: Land Pattern Compatibility Between 28x28 MQFP and LQFP Packages (Rev. 1)3/19/2007PDF41 kB
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EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev. 3)3/7/2007PDF108 kB
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EE-84: External Port DMA Modes of Operation for SHARC Processors (Rev. 2)3/2/2007PDF99K
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EE-223: In-Circuit Flash Programming on SHARC® Processors (Rev. 2)2/23/2007PDF258 kB
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EE-253: Power Bypass Decoupling of SHARC® Processors (Rev. 1)12/5/2006PDF354 kB
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EE-296: Using the UART Port Controller on SHARC® Processors (Rev. 2)11/22/2006PDF114 kB
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EE-295: Implementing Delay Lines on SHARC® Processors (Rev. 1)11/15/2006PDF0 kB
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EE-305: Designing and Debugging Systems with SHARC Processors (Rev. 1)11/15/2006PDF151 kB
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EE-290: Managing the Core PLL on SHARC® Processors (Rev. 5)7/12/2006PDF409 kB
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EE-286: Interfacing SDRAM Memories to SHARC® Processors (Rev. 5)12/1/2005PDF1701 kB
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EE-270: Extended-Precision Fixed-Point Arithmetic on SIMD SHARC® Processors (Rev. 1)7/8/2005PDF86 kB
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EE-264: Interfacing MultiMediaCard™ with ADSP-2126x SHARC® Processors (Rev. 1)5/6/2005PDF975 kB
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EE-268: Programming Asynchronous Sample Rate Converters on ADSP-2136x SHARC® Processors (Rev. 1)4/28/2005PDF2688 kB
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EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev. 1)4/4/2005PDF32 kB
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EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev. 1)2/15/2005PDF90 kB
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EE-260: Interfacing AD7865 Parallel ADCs to ADSP-2136x SHARC® Processors (Rev. 1)12/17/2004PDF500 kB
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EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev. 3)9/15/2004PDF1186 kB
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EE-232: Configuring the Signal Routing Unit of ADSP-2126x SHARC® DSPs (Rev. 1)2/18/2004PDF70 kB
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EE-189: Link Port Tips & Tricks For ADSP-2106x & ADSP-2116x SHARC® DSPs10/27/2003PDF105 kB
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EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs5/21/2003PDF174 kB
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EE-177: SHARC® SPI Slave Booting (Rev. 3)5/2/2003PDF43 kB
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EE-68: Analog Devices JTAG Emulation Technical Reference (Rev. 10)12/20/2002PDF293 kB
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EE-128: DSP in C++: Calling Assembly Class Member Functions From C++9/18/2002PDF172 kB
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EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev. 2)9/17/2002PDF88 kB
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EE-110: A Quick Primer on ELF and DWARF File Formats5/17/2000PDF19 kB
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EE-104: Setting Up Streams with the VisualDSP Debugger11/5/1999PDF120 kB
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SHARC® Audio EZ-Extender® Manual (Rev. 1.1)11/11/2009PDF617 kB
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Blackfin®/SHARC® USB EZ-Extender® Manual (Rev. 1.1)5/7/2009PDF359 kB
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ADSP-21369 EZ-KIT Lite® Evaluation System Manual (Rev. 2.4)9/15/2006PDF1912 kB
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SHARC® USB EZ-Extender® Manual (Rev. 2.1)7/26/2006PDF222 kB
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SHARC® EZ-Extender® Manual (Rev. 3.1)7/26/2006PDF235 kB
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SHARC Processors: Manuals9/10/2015
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Getting Started with SHARC2/14/2015
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SHARC® Processor Programming Reference (Includes ADSP-2136x, ADSP-2137x, and ADSP-214xx Processors) (Rev. 2.4)3/14/2007PDF5387 kB
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ADSP-2137x SHARC® Processor Hardware Reference (Rev. 2.2)9/28/2006PDF7425 kB
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VisualDSP++® 5.0 Assembler and Preprocessor Manual (Rev. 3.4)11/15/2009PDF3197 kB
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VisualDSP++® 5.0 C/C++ Compiler Manual for SHARC® Processors (Rev. 1.5)11/13/2009PDF2277 kB
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VisualDSP++® 5.0 Loader and Utilities Manual (Rev. 2.5)11/13/2009PDF2246 kB
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VisualDSP++® 5.0 Licensing Guide (Rev. 1.4)11/13/2009PDF392 kB
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VisualDSP++® 5.0 Kernel (VDK) Users Guide (Rev. 3.5)11/13/2009PDF2401 kB
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VisualDSP++® 5.0 Linker and Utilities Manual (Rev. 3.5)11/13/2009PDF2290 kB
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VisualDSP++® 5.0 Run-Time Library Manual for SHARC® Processors (Rev. 1.5)11/12/2009PDF2298 kB
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VisualDSP++® 5.0 Users Guide (Rev. 3.0)12/9/2007PDF2738 kB
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VisualDSP++® 5.0 Quick Installation Reference Card (Rev. 3.1)8/30/2007PDF91 kB
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VisualDSP++® 5.0 Getting Started Guide (Rev. 3.0)8/30/2007PDF2035 kB
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VisualDSP++® 5.0 Product Release Bulletin (Rev. 3.0)8/30/2007PDF774 kB
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ICE-1000/ICE-2000 Emulator User’s Guide (Rev. 1.2)6/3/2014PDF321 kB
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HPUSB, USB, and HPPCI Emulator User’s Guide (Rev. 3.2)11/11/2009PDF746 kB
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ICE-100B Emulator User’s Guide (Rev. 1.1)11/11/2009PDF348 kB
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ADSP-21369 SHARC Anomaly List for Revisions 0.0, 0.1, 0.2 (Rev. I)4/8/2011PDF181 K
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SHARC Processor Family9/21/2010PDF1836 kB
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EZ-KIT Lite for Analog Devices ADSP-21369 SHARC Processor4/2/2008PDF77 kB
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ADI Complementary Parts Guide - Supervisory Devices and DSP Processors2/12/2015PDF93 K
Software & Systems Requirements
Software & Tools Anomalies
Code Examples
ADSP-2136x Application Code Examples - Single Channel
ADSP-2136x Application Code Examples - Multi Channel
Software Development Tools
CrossCore® Embedded Studio
CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.
SigmaStudio®
Graphical development tool for programming, development, and tuning software for ADI DSP audio processors and A2B® transceivers.
Software Modules
SRS TruVolume, SHARC
The SRS TruVolume® library for the SHARC processor implements automatic volume-control post-processing that adjusts the amplitude of a stereo audio signal to maintain a constant perceived level of loudness in spite of level changes in the input audio material.
Tools & Simulations
Design Tools
IBIS Models
BSDL Model Files
Designing with BGA
Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
PCN-PDN Information
Support & Discussions
ADSP-21369 Discussions
LED_Debug_ADSP-21369_SPORT& SDRAM
7 week(s) ago in SHARC Processors
MP3 decoder for ADSP-21375 or 21369
24 week(s) ago in SC5xx/ADSP
Sample & Buy
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.