Overview
Features and Benefits
- 2.0 GHz/1.1 GHz
- 2.7 V to 5.5 V power supply
- Selectable charge pump supply (VP) allows extended tuning voltage in 3 V systems
- Selectable charge pump currents
- On-chip oscillator circuit
- Selectable dual modulus prescaler
- RF2: 32/33 or 64/65
- RF1: 32/33 or 64/65
- 3-wire serial interface
- Power-down mode
Product Details
The ADF420x family of dual frequency synthesizers are used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. Each synthesizer consists of a low noise, digital, phase frequency detector (PFD); a precision charge pump; a programmable reference divider; programmable A and B counters; and a dual modulus prescaler (P/P + 1). The A (6-bit) and B (11-bit) counters, in conjunction with the dual modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. The on-chip oscillator circuitry allows the reference input to be derived from crystal oscillators.
A complete phase-locked loop (PLL) can be implemented if the synthesizers are used with an external loop filter and voltage controlled oscillators (VCOs).
Control of all the on-chip registers is via a simple 3-wire interface. The devices operate with a power supply ranging from 2.7 V to 5.5 V and can be powered down when not in use.
Applications
- Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
- Base stations for wireless radio (GSM, PCS, DCS, CDMA, WCDMA)
- Wireless LANS Communications test equipment
- CATV equipment
Product Categories
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Documentation & Resources
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FAQs7/26/2017
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Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 37/1/1999 Analog Dialogue
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Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 25/1/1999 Analog Dialogue
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Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 13/1/1999 Analog Dialogue
Tools & Simulations
Design Tools
ADIsimRF
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
ADIsimPLL™
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
Product Recommendations
ADF4208 Companion Parts
Recommended Linear Regulators
- For ultralow noise, 3V applications,150 mA output: ADP150.
- For high accuracy, 5V applications: ADP3334.
- For ultalow noise, 3V applications, 200 mA output: ADP151.
- For a step up, 3V to 5V regulator: ADP1613.
Recommended Divide-by-4 Prescaler
- For a low noise, low power, fixed RF block: ADF5001.
Recommended Modulators/Demodulators
Recommended PLL Active Filter
- For an ultralow noise, rail-to-rail amplifier: OP184.
