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AD9446: 16-Bit, 80/100 MSPS Data Sheet (Rev. 0)10/1/2005PDF952 kB
Overview
Features and Benefits
- 100 MSPS guaranteed sampling rate (AD9446-100)
- 83.6 dBFS SNR with 30 MHz input (3.8 V p-p input, 80 MSPS)
- 82.6 dBFS SNR with 30 MHz input (3.2 V p-p input, 80 MSPS)
- 89 dBc SFDR with 30 MHz input (3.2 V p-p input, 80 MSPS)
- 95 dBFS 2-tone SFDR with 9.8 MHz and 10.8 MHz (100 MSPS)
- 60 fsec rms jitter
- Excellent linearity
DNL = ±0.4 LSB typical
INL = ±3.0 LSB typical
- 2.0 V p-p to 4.0 V p-p differential full-scale input
- Buffered analog inputs
- LVDS outputs (ANSI-644 compatible) or CMOS outputs
- Data format select (offset binary or twos complement)
- Output clock available
- 3.3 V and 5 V supply operation
Product Details
The AD9446 is a 16-bit, monolithic, sampling analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use. The product operates up to 100 MSPS, providing superior SNR for instrumentation, medical imaging, and radar receivers employing baseband (<100 MHz) IF frequencies.The ADC requires 3.3 V and 5.0 V power supplies and a low voltage differential input clock for full performance operation. No external reference or driver components are required for many applications. Data outputs are LVDS-compatible (ANSI-644) or CMOS-compatible and include the means to reduce the overall current needed for short trace distances.
Optional features allow users to implement various selectable operating conditions, including data format select and output data mode.
The AD9446 is available in a 100-lead surface-mount plastic package (100-lead TQFP/EP) specified over the industrial temperature range (−40°C to +85°C).
PRODUCT HIGHLIGHTS
- True 16 bit linearity.
- High performance: outstanding SNR performance for baseband IFs in data acquisition, instrumentation, magnetic resonance imaging, and radar receivers.
- Ease of use: On-chip reference and high input impedance track-and-hold. An output clock simplifies data capture.
- Packaged in a Pb-free, 100-lead TQFP/EP.
- Clock duty cycle stabilizer (DCS) maintains overall ADC performance over a wide range of clock pulse widths.
- OR (out-of-range) outputs indicate when the signal is beyond the selected input range.
APPLICATIONS
- MRI receivers
- Multi-carrier, multimode cellular receivers
- Antenna array positioning
- Power amplifier linearization
- Broadband wireless
- Radar, infrared imaging
- Communications instrumentation
Product Categories
Markets and Technologies
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (1)
Documentation & Resources
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AN-905: VisualAnalog™ Converter Evaluation Tool Version 1.0 User Manual8/18/2020
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AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)5/12/2015PDF985 kB
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AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)2/14/2015PDF227 K
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AN-282: Fundamentals of Sampled Data Systems2/14/2015PDF2131 kB
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AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)2/14/2015PDF291K
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AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)2/14/2015PDF363 kB
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AN-345: Grounding for Low-and-High-Frequency Circuits2/14/2015PDF455 kB
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AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)2/14/2015PDF207 kB
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AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)2/2/2012PDF392 kB
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AN-737: How ADIsimADC Models an ADC (Rev. B)11/9/2007PDF373 kB
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AN-807: Multicarrier WCDMA Feasibility (Rev. 0)11/9/2007PDF969 kB
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AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)11/9/2007PDF1535 kB
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AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)12/14/2004PDF370K
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AN-741: Little Known Characteristics of Phase Noise (Rev. 0)11/29/2004PDF1679 kB
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Designing Power Supplies for High Speed ADC2/1/2012
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Analog-to-Digital Converter Clock Optimization: A Test Engineering Perspective2/1/2008 Analog Dialogue
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Ask The Application Engineer—36: Wideband A/D Converter Front-End Design Considerations II: Amplifier-or Transformer Drive for the ADC?2/1/2007 Analog Dialogue
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ADC Input Noise: The Good, The Bad, and The Ugly. Is No Noise Good Noise?2/1/2006 Analog Dialogue
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Which ADC Architecture Is Right for Your Application?6/1/2005 Analog Dialogue
Tools & Simulations
Virtual Eval - BETA
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IBIS Models
AD9446 IBIS Models
MathWorks®
Design Tools
ADIsimRF
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
Visual Analog
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
| Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
|---|---|---|---|---|
| AD9446BSVZ-100 | Material Declaration | Reliability Data | 100-Lead TQFP (14mm x 14mm) | |
| AD9446BSVZ-80 | Material Declaration | Reliability Data | 100-Lead TQFP (14mm x 14mm) | |
| Wafer Fabrication Data |
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