Features and Benefits
- SNR: 83 dB (85 dBFS) to 10 MHz input
- SFDR: 87 dBc to 10 MHz input
- Noise figure: 15 dB
- Input impedance: 1 kΩ
- Power: 340 mW
- 1.8 V analog supply operation
- 1.8 V to 3.3 V output supply
- Selectable bandwidth 2.5 MHz/5 MHz/10 MHz
- Output data rate: 30 MSPS to 160 MSPS
- Integrated decimation filters
- Integrated sample rate converter
- On-chip PLL clock multiplier
- On-chip voltage reference
- Offset binary, Gray code, or twos complement data format
- Serial control interface (SPI)
The AD9261 is a 16-bit analog-to-digital converter (ADC) based on a continuous time sigma-delta (Σ-Δ) architecture that achieves 86 dB of dynamic range over a 10 MHz input bandwidth. The integrated features and characteristics unique to the continuous time Σ-Δ architecture significantly simplify its use and minimize the need for external components.
The AD9261 has a resistive input impedance that significantly relaxes the requirements of the driver amplifier. In addition, a 32× oversampled 5th-order continuous time loop filter significantly attenuates out of band signals and aliases, reducing the need for external filters at the input.
An external clock input or the integrated integer-N PLL provides the 640 MHz internal clock needed for the oversampled continuous time Σ-Δ modulator. On-chip decimation filters and sample rate converters reduce the modulator data rate from 640 MSPS to a user-defined output data rate between 30 MSPS to 160 MSPS, enabling a more efficient and direct interface.
The digital output data is presented in offset binary, Gray code, or twos complement format. A data clock output (DCO) is provided to ensure proper timing with the receiving logic.
The AD9261 operates on a 1.8 V analog supply and a 1.8 V to 3.3 V digital supply, consuming 375 mW. The AD9261 is available in a 48-lead LFCSP and is specified over the industrial temperature range (−40°C to +85°C).
- Continuous time Σ-Δ architecture efficiently achieves high dynamic range and wide bandwidth.
- Passive input structure reduces or eliminates the requirements for a driver amplifier.
- An oversampling ratio of 32× and high order loop filter provide excellent alias rejection reducing or eliminating the need for antialiasing filters.
- An integrated decimation filter, sample rate converter, PLL clock multiplier, and voltage reference provide ease of use.
- Operates from a single 1.8 V analog power supply and 1.8 V to 3.3 V output supply.
- A standard serial port interface (SPI) supports various product features and functions.
- Data Acquisition
- Automated Test Equipment
- Medical Imaging
Product Lifecycle Not Recommended for New Designs
This designates products ADI does not recommend broadly for new designs.
Evaluation Kits (1)
Documentation & Resources
AN-905: VisualAnalog™ Converter Evaluation Tool Version 1.0 User Manual8/18/2020
AN-878: High Speed ADC SPI Control Software (Rev. A)3/20/2018
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)5/12/2015
AN-282: Fundamentals of Sampled Data Systems2/14/2015
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)2/2/2012
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)11/9/2007
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)11/9/2007
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)9/20/2006
AN-283: Sigma-Delta ADCs and DACs9/24/2002
AD9261 Companion Parts
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
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