ADSP1802
推荐用于新设计SHARC Processor
- 产品模型
- 2
概述
- High performance 32-bit/40-bit floating-point processor for high performance audio processing
- SIMD computational architecture
- On-chip memory
- 5 Mb L1 on-chip RAM
- 8 Mb L2 RAM
- Maximum instruction rate up to 400 MHz
- Supports VISA
- Supports FIR, IIR, FFT accelerator
- DAI
- 8 SPORTs
- 4 PCGs
- 1 S/PDIF transceiver
- 4 ASRCs with −140 dB SNR performance
- 1 IDP/PDAP
- 1 DAI SRU
- DPI
- 2 SPIs
- 1 UART
- 12 flags
- 1 TWI
- 3 PWM modules (PWM1, PWM2, and PWM3)
- 2 general-purpose timers
- 1 DPI SRU2
- 1 thermal diode
- AEC-Q100 qualified for automotive applications
The ADSP1802 is a digital signal processor (DSP) that features Analog Devices, Inc. Super Harvard Architecture Single-Chip Computer (SHARC). The ADSP1802 is a 32-bit/40-bit floating point processor optimized for high performance audio applications with large on-chip RAM, multiple internal buses to eliminate I/O bottlenecks, and features an innovative digital applications interface (DAI).
Applications
- Audio and acoustic processing in cabin, including active sound design, advanced chime, hands free and voice preprocessing, active noise cancellation, and audio path management.
- Audio processing in consumer applications, including UI communication, professional audiovisual, hearables, and home theaters.
- Intelligent buildings with security and surveillance.
参考资料
数据手册 1
用户手册 2
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| 产品型号 | 引脚/封装图-中文版 | 文档 | CAD 符号，脚注和 3D模型 |
|---|---|---|---|
| ADSP1802KCPZ400-RL | 88-lead LFCSP (12 mm x 12 mm x 0.85 mm) | ||
| ADSP1802WBCPZ400-RL | 88-lead LFCSP (12 mm x 12 mm x 0.85 mm) |
这是最新版本的数据手册
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