概览

优势和特点

  • 1.0V/1.SV supply operation
  • 100MHz usable Analog Input Bandwidth
  • Sample-rate up to 2GSPS
  • Noise Density =-147 dBFS/Hz
  • SNR=66dBFS in 100MHz bandwidth, 2.0 GSPS encode
  • SFDR = 70dBc in 100MHz bandwidth, 2.0 GSPS encode
  • 90mW total power per channel at 2.0GSPS (default settings)
  • Flexible input range: 0.SVpp to 1.SVpp differential
  • >80dB channel isolation/crosstalk
  • Digital Processor
    • CIC Decimation Filter
    • Programmable DDCs (3 per ADC channel)
    • Data gating
  • JESD204B subclass 1 encoded outputs
    • Supports up to 16Gbps/lane
    • Flexible sample data processing
    • Flexible JESD204B Lane Configurations
  • Large signal dither
  • Serial Port control

产品详情

AD9083 is a 16-channel, 100MHz bandwidth, continuous-time sigma-delta (CTSD) analog-to-digital converter (ADC). It has an on-chip, programmable single-pole anti-aliasing filter and termination resistor, designed for low power, small size and ease of use.

The sixteen ADC cores features a first-order, continuous-time sigma-delta modulator architecture with integrated, background nonlinearity correction logic and self-cancelling dither. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.

The analog input and clock signals are differential inputs. Each ADC data output is internally connected to a digital signal processing block that contains a CIC decimator, a numerically controlled digital oscillator (NCO) with up to 3 quadrature channels of digital down converter (DDC) per ADC, followed by programmable FIR low-pass filter (LPF) and programmable data gating for pulse burst applications.

Users can configure the subclassl JESD204B based high-speed serialized output in a variety oflane configurations (up to 4), depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multi device synchronization is supported through the SYSREF±, TRIGGER± and SYNCINB± input pins.

AD9083 has flexible power-down options which allow significant power savings when desired. All of these features can be programmed using a l.SV capable 3-wire SPI interface. AD9083 will be available in a Pb-free, 100-ball BGA, and is specified over the -40°C to +85°C industrial temperature range.

This product is protected by a US patent.

Applications

  • Millimeter wave imaging
  • Electronic Beam-Forming & Phased Arrays
  • Multi-Channel Wideband Receivers
  • Electronic Support Measures

Product Highlights

  1. Continuous-time, Σ-Δ ADCs support signal bandwidths of up to 100 MHz with low power and minimal filtering.
  2. Integrated digital processing blocks reduce data payload and lower overall system cost.
  3. Configurable JESD204B interface reduces PCB complexity.
  4. Flexible power-down options.
  5. SPI interface controls various product features and functions to meet specific system requirements.
  6. Small 9 mm x 9 mm, 100-ball BGA package, simple interface, and integrated digital processing save PCB space.

产品生命周期 icon-recommended 预发布

本产品为新品,工程验证可能仍在进行中。我们正在准备量产,数量可能有限,设计规格可能会改变。

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