Diode Turn-On Time Induced Failures in Switching Regulators


Most circuit designers are familiar with diode dynamic characteristics such as charge storage, voltage dependent capacitance and reverse recovery time. Less commonly acknowledged and manufacturer specifi ed is diode forward turn-on time. This parameter describes the time required for a diode to turn on and clamp at its forward voltage drop. Historically, this extremely short time, units of nanoseconds, has been so small that user and vendor alike have essentially ignored it. It is rarely discussed and almost never specifi ed. Recently, switching regulator clock rate and transition time have become faster, making diode turn-on time a critical issue. Increased clock rates are mandated to achieve smaller magnetics size; decreased transition times somewhat aid overall effi ciency but are principally needed to minimize IC heat rise. At clock speeds beyond about 1MHz, transition time losses are the primary source of die heating.

A potential diffi culty due to diode turn-on time is that the resultant transitory “overshoot” voltage across the diode, even when restricted to nanoseconds, can induce overvoltage stress, causing switching regulator IC failure. As such, careful testing is required to qualify a given diode for a particular application to insure reliability. This testing, which assumes low loss surrounding components and layout in the fi nal application, measures turn-on overshoot voltage due to diode parasitics only. Improper associated component selection and layout will contribute additional overstress terms.

Diode Turn-On Time Perspectives

Figure 1 shows typical step-up and step-down voltage converters. In both cases, the assumption is that the diode clamps switch pin voltage excursions to safe limits. In the step-up case, this limit is defi ned by the switch pins maximum allowable forward voltage. The step-down case limit is set by the switch pins maximum allowable reverse voltage.

Figure 1. Typical Voltage Step-Up/Step-Down Converters. Assumption is Diode Clamps Switch Pin Voltage Excursion to Safe Limits.

Figure 2 indicates the diode requires a fi nite length of time to clamp at its forward voltage. This forward turn-on time permits transient excursions above the nominal diode clamp voltage, potentially exceeding the IC’s breakdown limit. The turn-on time is typically measured in nanoseconds, making observation diffi cult. A further complication is that the turn-on overshoot occurs at the amplitude extreme of a pulse waveform, precluding high resolution amplitude measurement. These factors must be considered when designing a diode turn-on test method.

Figure 2. Diode Forward Turn-On Time Permits Transient Excursion Above Nominal Diode Clamp Voltage, Potentially Exceeding IC Breakdown Limit.

Figure 3 shows a conceptual method for testing diode turn-on time. Here, the test is performed at 1A although other currents could be used. A pulse steps 1A into the diode under test via the 5Ω resistor. Turn-on time voltage excursion is measured directly at the diode under test. The fi gure is deceptively simple in appearance. In particular, the current step must have an exceptionally fast, high-fi delity transition and faithful turn-on time determination requires substantial measurement bandwidth.

Figure 3. Conceptual Method Tests Diode Turn-On Time at 1A. Input Step Must Have Exceptionally Fast, High Fidelity Transition.

Detailed Measurement Scheme

A more detailed measurement scheme appears in Figure 4. Necessary performance parameters for various elements are called out. A sub-nanosecond rise time pulse generator, 1A, 2ns rise time amplifi er and a 1GHz oscilloscope are required. These specifi cations represent realistic operating conditions; other currents and rise times can be selected by altering appropriate parameters.

Figure 4. Detailed Measurement Scheme Indicates Necessary Performance Parameters for Various Elements. Sub-Nanosecond Rise Time Pulse Generator, 1A, 2ns Rise Time Amplifi er and 1GHz Oscilloscope are Required.

The pulse amplifier necessitates careful attention to circuit configuration and layout. Figure 5 shows the amplifier includes a paralleled, Darlington driven RF transistor output stage. The collector voltage adjustment (“rise time trim”) peaks Q4 to Q6 FT; an input RC network optimizes output pulse purity by slightly retarding input pulse rise time to within amplifier passband. Paralleling allows Q4 to Q6 to operate at favorable individual currents, maintaining bandwidth. When the (mildly interactive) edge purity and rise time trims are optimized, Figure 6 indicates the amplifier produces a transcendently clean 2ns rise time output pulse devoid of ringing, alien components or posttransition excursions. Such performance makes diode turn-on time testing practical.1

Figure 5. Pulse Amplifier Includes Paralleled, Darlington Driven RF Transistor Output Stage. Collector Voltage Adjustment (“Rise Time Trim”) Peaks Q4 to Q6 FT, Input RC Network Optimizes Output Pulse Purity. Low Inductance Layout is Mandatory.

Figure 6. Pulse Amplifi er Output into 5Ω. Rise Time is 2ns with Minimal Pulse-Top Aberrations.

Figure 7 depicts the complete diode forward turn-on time measurement arrangement. The pulse amplifi er, driven by a sub-nanosecond pulse generator, drives the diode under test. A Z0 probe monitors the measurement point and feeds a 1GHz oscilloscope.2, 3, 4

Figure 7. Complete Diode Forward Turn-On Time Measurement Arrangement Includes Sub-Nanosecond Rise Time Pulse Generator, Pulse Amplifi er, Z0 Probe and 1GHz Oscilloscope.

Diode Testing and Interpreting Results

The measurement test fi xture, properly equipped and constructed, permits diode turn-on time testing with excellent time and amplitude resolution.5 Figures 8 through 12 show results for fi ve different diodes from various manufacturers. Figure 8 (Diode Number 1) overshoots steady state forward voltage for 3.6ns, peaking 200mV. This is the best performance of the fi ve. Figures 9 through 12 show increasing turn-on amplitude and time which are detailed in the fi gure captions. In the worst cases, turn-on amplitudes exceed nominal clamp voltage by more than 1V while turn-on times extend for tens of nanoseconds. Figure 12 culminates this unfortunate parade with huge time and amplitude errors. Such errant excursions can and will cause IC regulator breakdown and failure. The lesson here is clear. Diode turn-on time must be characterized and measured in any given application to insure reliability.

Figure 8. “Diode Number 1” Overshoots Steady State Forward Voltage for ≈3.6ns, Peaking 200mV.

Figure 9. “Diode Number 2” Peaks ≈750mV Before Settling in 6ns... > 2x Steady State Forward Voltage.

Figure 10. “Diode Number 3” peaks 1V above nominal 400mV VFWD, a 2.5x error..

Figure 11. “Diode Number 4” peaks ≈750mV with lengthy (note horizontal 2.5x scale change) tailing towards VFWD value.

Figure 12. “Diode Number 5” peaks offscale with extended tailing (note horizontal slower scale compared to Figures 8 thru 10).


1 An alternate pulse generation approach appears in Linear Technology Application Note 122, Appendix F, “Another Way to Do It.”

2 Z0 probes are described in Linear Technology Application Note 122 Appendix C, “About Z0 Probes.” See also References 27 thru 34.

3 The subnanosecond pulse generator requirement is not trivial. See Linear Technology Application Note 122 Appendix B, “Subnanosecond Rise Time Pulse Generators For The Rich and Poor.”

4 See Linear Linear Technology Application Note 122 Appendix E, “Connections, Cables, Adapters, Attenuators, Probes and Picoseconds” for relevant commentary.

5 See Linear Technology Application Note 122 Appendix A, “How Much Bandwidth is Enough?” for discussion on determining necessary measurement bandwidth.


Jim Williams

James M. Williams (April 14, 1948 – June 12, 2011) was an analog circuit designer and technical author who worked for the Massachusetts Institute of Technology (1968–1979), Philbrick, National Semiconductor (1979–1982) and Linear Technology Corporation (LTC) (1982–2011).[1] He wrote over 350 publications[2] relating to analog circuit design, including 5 books, 21 application notes for National Semiconductor, 62 application notes for Linear Technology, and over 125 articles for EDN Magazine. Williams suffered a stroke on June 10 and died on June 12, 2011.