Your design is nearly complete, but a nagging timing requirement has suddenly cropped up. It might call for a variable frequency oscillator, a low frequency timer, a pulse-width modulator, a controlled one-shot pulse generator, or an accurate delay. Regardless of the requirement, you need a quick, reliable, stable solution—there is no time to develop code for a microcontroller. You could build something out of discrete components and a comparator or two, or maybe the good old 555 timer could do the job, but will the accuracy be there? Will it take up too much room on the board? What about time to test and specify the bench-built timer?
There is a better way. Linear Technology’s TimerBlox® family of silicon timing devices solves specific timing problems with minimal effort. TimerBlox devices easily drop into designs with a fraction of the design effort or space requirements that a microcontroller or discrete-component solution would demand. It only takes a few resistors to nail down the frequency or time duration you require. That’s it, no coding or testing required. Complete solutions are tiny, composed of a 2mm × 3mm DFN, or a popular 6-lead SOT-23, plus a couple of resistors and decoupling cap.
A Toolbox Of TimerBlox Devices
All TimerBlox devices use Linear’s silicon oscillator technology, featuring low component count, vibration-immunity, fast start-up, and ease-of-use. Each TimerBlox device is purpose-built to solve a specific timing problem (see Table 1), so the performance of each device is specified for its intended application, eliminating the guesswork involved with configuring and applying do-it-all timers.
Device | Function | Options | Range | |
Voltage-Controlled Silicon Oscillator | Configurable frequency gain and voltage range | 488Hz to 2MHz | ||
Low Frequency Oscillator | Period range from 1ms to 9.5 hours | 29μHz to 977Hz | ||
Voltage-Controlled PWM | LTC6992-1 | 0%–100% Duty Cycle | 3.8Hz to 1MHz | |
LTC6992-2 | 5%–95% Duty Cycle | |||
LTC6992-3 | 0%–95% Duty Cycle | |||
LTC6992-4 | 5%–100% Duty Cycle | |||
One-Shot | LTC6993-1 | Rising-Edge Triggered | 1μs to 34 sec | |
LTC6993-2 | Rising-Edge Re-Triggerable | |||
LTC6993-3 | Falling-Edge Triggered | |||
LTC6993-4 | Falling-Edge Re-Triggered | |||
Delay | LTC6994-1 | 1-Edge Delay | 1μs to 34 sec | |
LTC6994-2 | 2-Edge Delay |
Because each TimerBlox device is designed to perform a specific timing function, the most significant design decision is choosing the proper part number. To further simplify design, five of the six package pins in all TimerBlox devices share the same name and function—with the remaining pin unique to the device function. Figure 1 details the function of each pin (SOT-23 shown).
Each Timerblox device offers eight different timing ranges and two modes of operation (which vary for each device). The operational state is represented by a 4-bit DIVCODE value, which is set by the voltage on the DIV pin. For the ultimate in simplicity, a resistor divider can be used to set the DIVCODE. For example, Figure 2 shows how changing the voltage at the DIV pin sets the functionality of the LTC6992 by selecting a DIVCODE from 0–15. The MSB of DIVCODE is a “mode” bit, in this case selecting the output polarity. The remaining bits choose the frequency range.
Once the proper DIVCODE has been determined, the frequency or timing duration is fine-tuned by a simple calculation for RSET. The set resistor establishes the frequency of an internal silicon oscillator master clock. The resulting circuit has guaranteed accuracy over the full 2.25V–5.5V supply range and –40°C to 125°C temperature range.
For an even easier design process, download “The TimerBlox Designer” from www.analog.com/en/products/clock-and-timing/timerblox—a free Excel-based tool that generates component values, schematics, and timing diagrams automatically.
Voltage-Controlled Oscillator can be Used for Fixed Frequency or Frequency Modulation
The LTC6990 is a resistor-programmable oscillator featuring 1.5% accuracy and an output enable function to force the output low or into a high-impedance state. The output frequency is determined by the NDIV frequency divider and RSET (which replaces VSET/ISET):
where NDIV = 1, 2, 4, ..., 128
While it can be used as a fixed-frequency oscillator, the LTC6990 can easily be applied as a frequency modulator. A second SET-pin resistor, RVCO, allows a control voltage to vary ISET and change the output frequency. Although this technique can be used with other silicon oscillators, they typically are limited in accuracy and suffer from poor supply rejection. The LTC6990 does not have these limitations because of three important enhancements:
- VSET (the SET pin voltage) is regulated to 1V and is accurate to ±30mV over all conditions. This allows RVCO to establish an accurate VCO gain.
- VSET is GND-referenced, allowing for a GND-referenced control voltage that is easy to work with.
- All TimerBlox devices allow for a wide 16:1 timing range within each NDIV setting, but only the LTC6990 uses a small 2× step through divider settings. That allows for maximum overlap between ranges to accommodate any 8:1 range of VCO frequencies (or 16:1 with a reduced-accuracy extended range). And since each TimerBlox device has eight different timing ranges, the LTC6990 still maintains a large 4096:1 total frequency range.
Figure 3 shows the LTC6990 configured as a VCO that translates a 0V to 3.3V control voltage into a 40kHz to 400kHz frequency. Due to the LTC6990’s high modulation bandwidth, the output responds quickly to control voltage changes, as can be seen in Figure 4.
Low Frequency Solutions
The LTC6991 picks up in frequency where the LTC6990 leaves off, with an enormous 29μHz to 977Hz range (a period range of 1ms to 9.5 hours). It incorporates a fixed 10-stage frequency divider and a programmable 21-stage divider.
Since the applications for frequency modulation are rare at such low frequencies, the emphasis for this part is on covering as wide a range as possible. Therefore, the LTC6991 uses large 8× steps between NDIV settings. The trade-off is a smaller 2× overlap between ranges. The output interval relationship is:
where NDIV = 1, 8, 64, ..., 221
The LTC6991 is designed to handle long duration timing events. In place of an output enable, it includes a similar reset function. The RST pin can truncate the output pulse or prevent the output from oscillating at all, but it has no effect on the timing of the next rising edge. This function allows the LTC6991 to initiate an event with a variable duration, perhaps controlled by another circuit. Otherwise, if RST is inactive, the LTC6991 produces a square wave.
Figure 5 shows how a simple camera intervalometer can be constructed from the LTC6991 and a handful of discrete components. An intervalometer is used in time-lapse photography to capture images at specific intervals. The shutter rate might range from a few seconds to a few hours. In this example, the photographer can choose any interval between 8 seconds and 8.5 minutes.
An RC delay from OUT to RST allows for a 3-second shutter pulse before resetting the output. Potentiometer RS1 varies the total resistance at the SET pin from 95.3k to 762k to adjust the period from 8 seconds to 64 seconds, with DIVCODE set to 4 by R1A and R2. Closing the SLOW RANGE switch changes the DIVCODE to 5, increasing NDIV by 8× to extend the interval up to 8.5 minutes.
Figure 6 shows how easy it is to add timing functions on top of each other using TimerBlox devices. Here the LTC6994-1 is added to the intervalometer in Figure 5 to create an intervalometer with shutter-speed adjustment.
Pulse-Width Modulator
The LTC6992 TimerBlox oscillator features pulse-width modulation—the ability to control output duty cycle with a simple input voltage. The LTC6992 makes quick work of a technique that is useful for many applications: light dimming, isolated proportional control, and efficient load control, to name a few.
The MOD pin accepts a control voltage with a range of 0.1V to 0.9V that linearly regulates the output duty cycle. The 0.1V “pedestal” ensures that an op-amp or other input driver is able to reach the bottom of the control range. The duty cycle is given by:
The output frequency is governed by the simple relationship shown below. The total frequency range of the LTC6992 covers 3.8Hz to 1MHz, using 4× divider steps in the eight NDIV settings.
where NDIV = 1, 4, 16, ..., 16384
The LTC6992-1 allows for the full duty cycle range, covering 0% (for VMOD ≤ 0.1V) to 100% (for VMOD ≥ 0.9V). At the extremes, the output stops oscillating, resting at GND (0% duty) or V+ (100% duty). Some applications (such as coupling a control signal across an isolation transformer) require continuous oscillation. For such applications, choose the LTC6992-2, which limits the output duty cycle to 5% min and 95% max. The LTC6992-3 and LTC6992-4 complete the family by limiting the duty cycle at only one extreme. Figure 7 shows the measured response for the LTC6992 family.
Figure 8 shows a typical circuit. With the frequency divider (NDIV) set to 1 and RSET = 200k, this PWM circuit is configured for a 250kHz output frequency. Figure 9 demonstrates the circuit in action for both the LTC6992-1 and the LTC6992-2. The high modulation bandwidth allows the output duty cycle to quickly track changes in the modulation voltage.
One-Shot Events
Of course, not all timing applications require a stable frequency oscillator output. Some circuits require an event-triggered fixed-duration pulse, like that produced by the LTC6993 monostable (one-shot) pulse generator, which offers eight different logic functions and a huge 1μs to 34-second timing range. The one-shot duration tOUT is established by RSET:
where NDIV = 1, 8, 64, ..., 221
The LTC6993 is triggered by a rising or falling transition on its TRIG pin, which initiates an output pulse with pulse width tOUT. Some variations include the ability to “retrigger” the pulse, extending the output pulse duration with additional trigger signals. And each version can be configured to produce logic high or low output pulses using the MSB of the DIVCODE.Table 2 summarizes the different options.
Device | Input Polarity | Re-trigger |
LTC6993-1 | Rising-Edge | No |
LTC6993-2 | Rising-Edge | Yes |
LTC6993-3 | Rising-Edge | No |
LTC6993-4 | Rising-Edge | Yes |
Figure 10 shows a basic circuit, with the DIVCODE set to 3 (NDIV = 512, POL = 0) by a resistor divider and a 97.6k RSET defining a 1ms output pulse width. To demonstrate the difference between retriggerable and non-retriggerable functionality, Figure 11 shows the results of using either the LTC6993-1 or LTC6993-2 in this circuit.
The LTC6994 for Programmable Delay and Pulse Qualification
The LTC6994 is a programmable delay or pulse qualifier. It can perform noise filtering, which distinguishes its function from a delay line. The LTC6994 is available in two versions, as detailed in Table 3. The LTC6994-1 delays the rising or falling edge of the input signal. The LTC6994-2 delays any input transition, rising or falling, and can invert the output signal.
Device | Delay Function |
LTC6994-1 | |
LTC6994-2 |
The LTC6994’s programmable delay (denoted as tDELAY below) can vary from 1μs to 34 seconds, accurate to ±3% in most conditions.
where NDIV = 1, 8, 64, ..., 221
The output will only respond to input changes that persist longer than the delay period. This operation is well suited for pulse qualification, switch debouncing, or guaranteeing minimum pulse widths. The basic circuit in Figure 12 is configured for a 100μs delay. Figure 13 demonstrates the difference between the LTC6994-1, which delays either the rising or falling transition, and the LTC6994-2, which delays transitions in both directions. Both versions will reject narrow pulses, but the LTC6994-2preserves the original signal’s pulse width.
In addition to this type of noise filtering, the LTC6994 is useful for delay matching, generating multiple clock phases, or doubling the clock frequency of the input signal, as shown in Figure 14.
Motor Speed Alarm
There is no limit to how TimerBlox devices can be combined to easily produce esoteric timing functions. For instance, the design in Figure 15 combines one shots and delay blocks with a VCO to produce a high/low motor speed alarm. The circuit sounds a high frequency tone if a motor is spinning too fast and a low frequency tone if too slow.
The input is taken from a motor shaft encoder or other rotational sensor and used to trigger a one shot to produce a 1ms pulse per revolution.
The fast alarm threshold can be set between 10,000 rpm and 1500 rpm which, in time, is one pulse every 6ms to 40ms. Re-triggerable one shot, U3, is adjusted for a time interval equal to the warning threshold value. If it is continually re-triggered and not allowed to time out, then the motor is turning too fast.
For time-filtering, a delay timer, U4, is programmed by the same threshold adjust voltage to delay an output signal until the motor has exceeded the threshold speed for 100 revolutions (600ms to 4000ms). The delayed output signal enables an LTC6990 oscillator to produce a 5kHz warning tone.
The slow alarm threshold can be set between 1200 rpm and 120 rpm or one pulse every 50ms to 500ms. The delay timer, U5, pulses its output if allowed to time out because the motor speed is too slow. This output re-triggers one shot U6 and keeps its output high as long as the speed remains too slow.
Another time filter is created with delay block U7 which sounds a lower frequency alarm if the motor remains too slow for 10 revolutions (500ms to 5000ms). Two OR gates are used to detect when the motor has stopped completely.
Conclusion
The Linear Technology TimerBlox family of silicon oscillators fills a designer’s toolbox with simple and dependable timing solutions that require minimal design effort to produce accurate and reliable circuits. Several of the five core products are available in multiple versions to cover more applications and reduce the need for external components.
Each part is designed to be as flexible as possible with a 2.25V to 5.5V supply range, up to –40°C to 125°C temp range and wide timing ranges. In addition, the parts are offered in a small 2mm × 3mm DFN or a low-profile SOT-23 (ThinSOT™) package when a leaded package is required.