The ADSP-TS201S EZ-KIT Lite provides developers with a cost-effective method for initial evaluation of the ADSP-TS201S TigerSHARC® Processor and its multiprocessing capabilities. This EZ-KIT Lite includes two ADSP-TS201S processors on a desktop evaluation board along with fundamental debugging software to facilitate architecture evaluations via a USB-based PC-hosted tool set. With this EZ-KIT Lite, users can learn more about ADI’s ADSP-TS201S hardware and software development environments and quickly prototype applications. The ADSP-TS201S EZ-KIT Lite provides an evaluation suite of the VisualDSP++ development and debugging environment with the C/C++ compiler, assembler, and linker. Via the USB interface, VisualDSP++ can communicate with the included software debug agent enabling users to perform standard debugging functions (such as read and write memory, read and write registers, load and execute executables, set and clear breakpoints, and single-step assembly, C, and C++ source code) and multiprocessor functions (such as synchronous step, synchronous run, and synchronous halt). The evaluation versions of the included software tools have limited use with the EZ-KIT Lite.
The EZ-KIT Lite’s default EPROM boot mode enables the board to be used as a standalone unit without the requirement for a PC-host. If desired, the board can boot from an optional external host port interface connector, link port or “No Boot” based on jumper selections. The EZ-KIT Lite also includes a FLASH utility that can be used to download user specific boot code to the on-board FLASH memory using the USB interface
Part Number: ADZS-TS201S-EZLITE
Tel: 1-800-ANALOGD (262-5643)
- Dual ADSP-TS201S TigerSHARC® Processors
- 4 Mb (512K x 8-bit) FLASH memory
- 32 MB (4M x 64-bit) SDRAM
- AD1871 stereo, 24-bit, 96 kHz, multi-bit Sigma-Delta ADC
- AD1854 stereo, 24-bit, 96 kHz, multi-bit Sigma-Delta DAC
- Two 1/8” stereo audio jacks
- 4 external LVDS link port connectors (1 Transmit and 1 Receive per processor)
EMULATOR-USB & HP USB ICE
Analog Devices’ cost-effective Universal Serial Bus (USB)-based emulator and High performance (HP) Universal Serial Bus (USB)-based emulator each provide an easy, portable, non-intrusive, target-based debugging solution for Analog Devices JTAG processors and DSPs. These powerful USB-based emulators perform a wide range of emulation functions, including single-step and full speed execution with pre-defined breakpoints, and viewing and/or altering of register and memory contents. With the ability to automatically detect and support multiple I/O voltages, the USB and HP USB emulators enable users to communicate with all of the Analog Devices JTAG processors and DSPs using either a full speed USB 1.1 or high speed USB 2.0 port on the host PC. Applications and data can easily and rapidly be tested and transferred between the emulators and the separately available VisualDSP++ development and debugging environment(sold separately).
The plug-and-play architecture of USB allows the emulators to be automatically detected and configured by the host operating system. It can also be connected to and disconnected from the host without opening the PC or turning off the power to the PC. A 3-meter cable is included to connect the emulators to the host PC, thus providing abundant accessibility to hard to reach targets.
The HP USB-based emulator also supports the Background
Telemetry Channel (BTC), a non-intrusive method
for exchanging data between the host and target
application without affecting the target system's
Part Number: ADZS-USB-ICE
High Performance USB-Based Emulator
Part Number: ADZS-HPUSB-ICE
Tel: 1-800-ANALOGD (262-5643)
For additional information, contact your local Analog Devices Sales Office or Distributor.
- Full speed USB 1.1 interface enabling download speeds of up to 150 KB/Sec (ADZS-USB-ICE) or High speed USB 2.0 interface enabling download speeds of up to 1.5MB/sec (ADZS-HPUSB-ICE)
- Background Telemetry Channel (BTC) support enabling non-intrusive data exchange at up to 2.0 MB/sec (ADZS-HPUSB-ICE only)
- 1.8V, 2.5V, and 3.3V compliant and tolerant
- Support for all ADI JTAG processors and DSPs
- 5V tolerant and 3.3V compliant for 5V processors and DSPs
- Multiprocessor support
- 14-pin JTAG connector
- 3-meter USB cable for difficult-to-reach targets
ソフトウェア & システム
Note: These IBIS models should not be used to simulate LVDS link ports. HSPICE models for the LVDS link ports are available on request through <a href="mailto:firstname.lastname@example.org">email@example.com</a>.
BSDL Model Files
Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages
Latest revisions to BSDL file.
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.