LTM8060

デモ回路2820Aでは、熱強化型の11.9mm × 16mm × 3.32mm BGAパッケージに収容されたクワッド出力の高性能な降圧Silent Switcher^® μModuleレギュレータである、LTM8060 μModule^®レギュレータが使用されています。DC2820Aの動作入力電圧範囲は広く、5.4V～40Vです。出力レールの構成は5V、3.3V、1.5V、1.2Vに対応し、抵抗は0.8V～8Vの範囲でプログラムできます。各出力は最大3Aを供給でき、位相を並列化して、高レール電流条件を満たすこともできます。LTM8060は、小型のフォーム・ファクタにすべての機能を完備したマルチ出力DC/DCポイント・オブ・ロード・レギュレータで、わずかな入出力コンデンサと抵抗のみで出力電圧と動作周波数を設定できます。TRSSピンを通じて、電源シーケンシング用の出力電圧トラッキングを利用できます。SYNCピンを通じて外部クロック同期を利用可能で、CLKOUTピンでオプションの追加位相の同期を利用できます。ノイズを低減させるには、SYNCピンのプログラミングにより、スペクトラム拡散動作を使用できます。デモ回路2820Aを使用または変更する場合は、DC2820Aのデモ・マニュアルと併せてLTM8060のデータシートを参照する必要があります。 

ADXBAND16EBZ Digitizing Card

• Multi-Channel, Wideband System Development Platform Using Apollo (AD9084)
• Mates With Xilinx VCU118 Evaluation Board (Not Included)
• 16x RF Receive (Rx) Channels
• Total 16x 8GSPS to 20GSPS ADC
• Digital Down Converters (DDCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
• Programmable Finite Impulse Response Filters (pFIRs)
• Complex Finite Impulse Response Filters (CFIRs)
• 16x RF Transmit (Tx) Channels
• Total 16x 8GSPS to 28GSPS DAC
• Digital Up Converters (DUCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
• Programmable Finite Impulse Response Filters (pFIRs)
• Complex Finite Impulse Response Filters (CFIRs)
• Flexible Rx & Tx RF Front-Ends
• Rx: Filtering, Amplification, Digital Step Attenuation for Gain Control
• Tx: Filtering, Amplification
• Flexible Clock Distribution
• On-Board Clock Distribution from Single External 400MHz Reference
• Support for External Converter Clock per AD9084 via solder rework
• On-Board Power Regulation from Single 12V Power Adapter (Included)

16Tx / 16Rx Calibration Board

• Mates to ADXBAND16EBZ Digitizing Card & VCU118 PMOD Interface (Cable Included)
• Provides Both Individual Adjacent Channel Loopback and Combined Channel Loopback Options
• Combined Tx Channels Out Option
• Combined Rx Channels In Option

Software Features and Benefits

Easy Control Tools and Platform Interfaces to Simplify Software Framework Developments:

• IIO Oscilloscope GUI
• MATLAB Add-Ons & Example Scripts
• Example HDL Builds including JESD204C Bring-Up
• Embedded Software Solutions for Linux and Device Drivers

Software Reference Design Examples for ADEF Applications to Reduce Prototyping Time:

• Multi-Chip Synchronization for Power-Up Phase Determinism
• System-Level Amplitude/Phase Alignment Using NCOs
• Low-Latency ADC-to-DAC Loopback Bypassing JESD Interface
• pFIR Control for Broadband Channel-to-Channel Amplitude/Phase Alignment
• Fast-Frequency Hopping

The ADXBAND16EBZ contains four AD9084 mixed‑signal front‑end devices, including the RF front end, clocking, and power circuitry. The ADXBAND16EBZ serves as a complete system solution targeting common applications such as phased‑array radars, wideband systems, and ground‑based SATCOM. Its primary target application is a 16‑Tx/16‑Rx direct X‑band sampling phased array.

The platform is intended as a testbed for demonstrating multi‑chip synchronization, as well as implementing system‑level calibrations, beamforming algorithms, and other signal‑processing techniques. The system is designed to interface with the VCU118 Evaluation Board from Xilinx^®, which features the Virtex^® UltraScale+™ XCVU9P FPGA, along with provided reference software, HDL code, and MATLAB system‑level interfaces.

A 16‑Tx/16‑Rx Calibration Board can be used to develop system‑level calibration algorithms, including demonstrations of power‑up phase determinism. The Calibration Board provides improvements in combined‑channel dynamic range, spurious performance, and phase noise, and can be controlled via a MATLAB add‑on when connected to the PMOD interface of the VCU118.