Recent progress in the area of very-large-scale integration (VLSI) has broadened the application of digital control, especially in power electronics. Digital control ICs can achieve benefits such as smaller die size, fewer passive components, and reduced cost. Furthermore, digital control enables system configuration through the power management bus (PMBus™); advanced control algorithms improve performance; and programmability allows application optimization. As digital power management becomes increasing pervasive, replacing many analog controllers, it must maintain backward compatibility with existing features so that both digital power modules and analog power modules can operate in the same system.
Output-voltage trimming is typically used in analog power modules, allowing the end user to change the power module’s output voltage via an external resistor. This enhances flexibility by allowing a few select, standard modules to be applied to virtually any application, regardless of the voltage requirements. Figure 1 shows a typical configuration for trimming output voltage in the AGF600-48S30 analog power module.
The output voltage is adjusted by varying the resistance connected to the power module’s positive output or ground terminals. The output voltage can be trimmed up (above the nominal output voltage) by connecting external resistor RUP while floating RDOWN, or trimmed down (below the nominal output voltage) by connecting external resistor RDOWN while shorting RUP (resistance equals to zero).
In the analog solution, RUP and RDOWN change the reference voltage to the error amplifier. The error amplifier senses the output voltage via a resistor divider connected to its inverting input using negative feedback. The output voltage of the error amplifier controls the duty cycle of the drive signals that set the output voltage. The output voltage thus follows the reference voltage, which is changed by RUP or RDOWN, thereby trimming the output voltage up or down.
Figure 2 shows two implementations that are widely adopted in analog power modules. The analog controller shown in Figure 2(a) has a pin that allows external resistor RDOWN to reduce the voltage on the noninverting input of the error amplifier, thus decreasing the output voltage. External resistor RUP is placed in series with the resistive divider to reduce the voltage applied at the inverting input of the error amplifier, thus increasing the output voltage. The analog controller shown in Figure 2(b) doesn’t provide access to the internal reference voltage, but an external error amplifier and voltage reference can be added to allow output-voltage trimming. The output of the external amplifier is connected to the output of the internal amplifier, effectively bypassing the internal error amplifier. Then, the voltage reference can be configured with the same circuit as before, allowing both power modules to be trimmed in the same way.
With a digital controller, all of the control functions are implemented using digital logic. Figure 3 shows a functional block diagram of the ADP1051 advanced digital controller with PMBus interface. Ideal for high-density dc-to-dc power conversion, it has six programmable pulse-width modulation (PWM) outputs capable of controlling most high-efficiency power supply topologies. It also controls synchronous rectification (SR) and integrates six analog-to-digital converters (ADCs) that sample the analog input voltage, input current, output voltage, output current, temperature, and other parameters. Once converted into data, these signals are sent to the digital core block for processing. Based on a flexible state machine architecture with all features implemented in hardware, it provides a robust, reliable solution, but it cannot be programmed to implement a function for which it was not inherently designed. All of its functions, including output-voltage trimming, are processed digitally. To trim the output voltage, a command to change the value of the digital reference is sent via the PMBus interface.
In the control-loop feedback path, the output voltage, scaled by a resistor divider or operational amplifier, is fed to the VS+ pin. An ADC samples this voltage. The digital core knows the programmed output voltage and the digital reference voltage that is set via the PMBus interface. A digital comparator and compensation filter compares the digital reference voltage with the sensed scaled output voltage and generates an error signal that controls the PWMs, just as with the analog controller. Unfortunately, the digital comparator can only use the digital reference voltage via the PMBus. The digital comparator, digital reference voltage, and digital compensation filter all operate with logic-level signals, so it is impossible for them to use an external reference voltage and bypass the internal comparator and filter. Limited by this fixed hardware configuration, the only way to achieve backward compatibility with existing analog trimming functions is to adjust the voltage sensed by the ADC at the VS+ pin. One way do this is to reconfigure the feedback network.
In Figure 4, RD1 and RD2 form the standard feedback network—a simple resistive divider that scales the output voltage before it is sensed by the ADC. The sensed voltage is
where VO is the actual output voltage of the power module. With the standard feedback network, the output voltage cannot be trimmed in the analog way. Reconfiguring the feedback network by adding RUP, RT0, and VTRIM, as shown in Figure 4, allows the scaled output voltage to be adjusted. Now, the sensed voltage is
The nominal voltage at the VS+ pin is 1 V. If VTRIM is around 1 V and the value of RT0 is relatively large compared with that of RD2, the additional branch can be neglected. The composite network works as a simple divider, and adjusting the resistance of RUP provides a similar characteristic as the analog controller, allowing up-trimming compatibility with analog power modules.
Providing down-trimming compatibility is more complicated, however. The digital controller won’t know the exact output voltage that the system should output, so it will try to minimize the error between VVS+ and the internal digital reference. VVS+ will always follow the internal digital reference, which is typically set at 1 V. Equation 2 shows that VO and VTRIM have a linear relationship. From Figure 2, the mechanism for trimming the output voltage down is to generate an error voltage representing the voltage difference between the desired output voltage and nominal output voltage. This error voltage will be subtracted by the internal voltage reference before it is applied to the noninverting input of the error amplifier. If the same voltage difference is added to the inverter input of the error amplifier, both circuits will provide the same result. Therefore, rather than being fixed, VTRIM should be proportional to the voltage difference between the desired output voltage and the nominal voltage.
Figure 5 shows a circuit that provides up-trimming and down-trimming compatibility. Two resistor dividers generate two voltage references, one representing the desired output-voltage reference and one representing the internal voltage reference of an analog controller. A voltage follower is used to avoid interaction between desired output-voltage reference and the following circuit. The desired output-voltage reference (V1) is subtracted by the internal voltage reference of an analog controller (V2) by an AD822 FET-input op amp to generate the desired voltage difference. The linear gain ensures that VTRIM is large enough to affect VVS+ when the desired output-voltage difference is related large.
The target output-voltage trimming characteristics are defined in the AGF600-48S30 data sheet. Table 1 shows a set of resistor values that provides compatibility with this power module.
Table 1. Resistor Values for the Circuit Shown in Figure 5
|R1||7.5 kΩ||R5||5.6 kΩ||R4||120 kΩ||R7||120 kΩ|
|R2||30 kΩ||R6||30.9 kΩ||R14||2200 kΩ||R8||2200 kΩ|
|R10||20 kΩ||R13||1 kΩ||R12||29 kΩ||RT0||17.8 kΩ|
Using Equation 2 and the values shown in Table 1, the output-voltage trimming characteristic can be calculated. Figure 6 shows a plot of the results. The error between the target and calculated values is based on the reconfigured feedback network. This error is very small (less than 0.1 V with a 30-V nominal output voltage), which means this circuit provides very good results.
The calculations verify this method of reconfiguring the feedback network to trim the output voltage, and provide a path for other digital power controllers—such as the ADM1041A, ADP1046A, ADP1050, and ADP1053—that use a digital voltage reference to provide backward compatibility with analog controllers, enhancing the flexibility of the digital power solution.
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