How to Use Zero-Drift Amplifiers in Wider Bandwidth Applications


This article provides a short description of chopping, auto-zeroing, and the sources of zero-drift artifacts, including a summary of some techniques that amplifier designers can use to reduce their impact. It also explains how to minimize the impact of these residual AC artifacts in a precision signal chain, including matching input source impedance, filtering, and frequency planning.


Zero-drift operational amplifiers use chopping, auto-zeroing, or a combination of both techniques to remove unwanted low frequency error sources like offset and 1/f noise. Traditionally, these amplifiers have only been used in low bandwidth applications since these dynamic techniques produce artifacts at higher frequencies. Wider bandwidth solutions can also benefit from zero-drift op amps’ excellent DC performance as long as high frequency errors such as ripple, glitches, and intermodulation distortion (IMD) are considered in the system design.

Zero-Drift Techniques

Chopping Background 1 – 7

The first zero-drift technique, chopping, uses modulation to separate offset and low frequency noise from the signal content by modulating the errors to higher frequencies.

Figure 1 shows (b) how chopping modulates the input signal (blue waveform) to a square wave, processes that signal in the amplifier, then (c) demodulates the signal at the output back to DC. At the same time, the low frequency errors (red waveform) in the amplifier are (c) modulated at the output to a square wave, which is then (d) filtered by the low-pass filter (LPF).

Figure 1. Time domain waveforms of the signal (blue) and errors (red) at (a) input, (b) V1, (c) V2, and (d) VOUT.

Similarly, in the frequency domain, the input signal (Figure 2, blue signal) is (b) modulated to the chopping frequency, processed by the gain stage at fCHOP, (c) demodulated at the output back to DC, and finally (d) passed through the LPF. The offset and noise sources (Figure 2, red signal) of the amplifier are processed at DC through the gain stage, (c) modulated to fCHOP by the output chop switches, and finally (d) filtered by the LPF. Since square wave modulation is employed, the modulation occurs around odd multiples of the modulation frequency.

Figure 2. Frequency domain spectrum of the signal (blue) and errors (red) at (a) input, (b) V1, (c) V2, and (d) VOUT.

As can been seen in both the frequency and time domain illustrations, there will be some residual error due to the modulated noise and offset since the LPF is not an ideal brick wall.

Auto-Zero Background 1 – 3, 5 – 7

A second zero-drift technique, auto-zeroing, is also a dynamic correction technique that works by sampling and subtracting low frequency error sources in an amplifier.

Figure 3 shows an example of a basic auto-zero amplifier. It consists of an amplifier with offset and noise, switches to reconfigure the input and output, and an auto-zero sampling capacitor.

Figure 3. A basic auto-zero amplifier.

During the auto-zero phase, ϕ1, the circuit’s input is shorted to a common voltage and the auto-zero capacitor samples the input offset voltage and noise. Note that the amplifier is unavailable for signal amplification during this phase. For an auto-zeroed amplifier to operate in a continuous manner, two identical channels must be interleaved. This is called ping-pong auto-zeroing.

During the amplification phase, ϕ2, the input is connected back to the signal path and the amplifier is again available for amplifying the signal. The low frequency noise, offset, and drift are cancelled by auto-zeroing, and the remaining error is the difference between the current value and previous sample of the errors. Because low frequency error sources do not change much from ϕ1 to ϕ2, this subtraction works well. High frequency noise, on the other hand, is aliased down to baseband and results in an increased white noise floor as shown in Figure 4.

Due to the noise folding and the need for an additional channel for continuous operation, chopping can be a more power efficient zero-drift technique for standalone op amps.2

Chopping Artifacts 1 – 3, 5 – 7

Although chopping works well to remove unwanted offset, drift, and 1/f noise, it produces unwanted AC artifacts such as output ripple and glitches. Analog Devices’ recent zero-drift products have taken steps to make the magnitude of these artifacts smaller and located at higher frequencies, which makes filtering easier at the system level.

Ripple Artifact

Ripple is a basic consequence of the chopping modulation technique that moves these low frequency errors to odd harmonics of the chopping frequency. Amplifier designers employ many methods to reduce the effects of ripple, including:

Production offset trimming: The nominal offset can be significantly reduced by performing a one-time initial trim, but the offset drift and 1/f noise remain.

Combining chopping and auto-zeroing: The amplifier is first auto-zeroed then chopped to upmodulate the increased noise spectral density (NSD) to a higher frequency. Figure 4 shows the resulting noise spectrum after chopping and auto-zeroing.

Figure 4. Noise PSD: before chop or AZ, after AZ, after chop, and after chop and AZ.

Autocorrection feedback (ACFB): A local feedback loop can be used to sense the modulated ripple at the output and null out the low frequency errors at their source.

Glitch Artifact

Glitches are transient spikes that are caused by charge injection mismatch from the chopping switches. The magnitude of these glitches depends on many factors including source impedance and the amount of charge mismatch.1 The glitch spikes not only cause artifacts at the even harmonics of the chop frequency but also create a residual DC offset, which is proportional to the chopping frequency. Figure 5 (left) illustrates what these spikes look like at V1 (inside the chop switches) and V2 (after the output chop switches) in Figure 1. Additional glitch artifacts at even harmonics of the chop frequency are caused by finite amplifier bandwidth as shown in Figure 5 (right).

Figure 5. (L) Glitch voltage from charge injection at V1 (inside the chopping switches) and V2 (outside the chopping switches) in Figure 1; (R) glitches caused by finite amplifier bandwidth at V1 and V2 in Figure 1.

Like with ripple, amplifier designers have techniques to reduce the impact of glitches in zero-drift amplifiers:

Charge injection trim: A trimmable charge can be injected into the inputs of a chopped amplifier to compensate for charge mismatch, which reduces the amount of input current at the op amp’s inputs.

Multichannel chopping: This not only reduces glitch magnitude but also moves it to a higher frequency making filtering easier. This technique results in more frequent glitches but with smaller magnitudes than simply chopping at a higher frequency. Figure 6 compares a typical zero-drift amplifier to the ADA4522, which uses this technique to significantly reduce the impact of glitches.

Figure 6. Voltage spikes are reduced to the noise floor in the ADA4522.8
Figure 7. Chopper amplifier artifacts including an upmodulated ripple and a charge injection glitch.

In summary, Figure 7 shows the output voltage of a chopper amplifier, which contains:

Ripple caused by upmodulated offset and 1/f noise at odd multiples of the chopping frequency

Glitches caused by charge injection mismatch of the chopping switches and finite amplifier bandwidth at even multiples of the chopping frequency

System-Level Considerations

When using a zero-drift amplifier in a data acquisition solution, it is important to understand where the frequency artifacts are and plan for them accordingly.

Finding the Chopping Frequency in the Data Sheet

The chopping frequency is usually explicitly stated in the data sheet, but it can also be determined by looking at the noise spectrum plots. A couple of ADI’s latest zero-drift amplifier data sheets show where in the spectrum artifacts occur.

The ADA4528 data sheet not only explicitly states a chopping frequency of 200 kHz in the Applications Information section of the data sheet, but this can also clearly be seen in the noise density plot in Figure 8.

Figure 8. The noise density plot of the ADA4528.

In the Theory of Operation section of the ADA4522’s data sheet, the chopping frequency is stated to be 4.8 MHz with an offset and ripple correction loop operating at 800 kHz. Figure 9 shows the noise density of the ADA4522 where these noise peaks are visible. There is also a noise bump at 6 MHz due to the reduced phase margin of the loop when in unity gain, which is not unique to zero-drift amplifiers.

Figure 9. The noise density plot of the ADA4522.

It is important to keep in mind that the frequency described in the data sheet is a typical number and can vary from part to part. For this reason, if the system requires two chopped amplifiers for differential signal conditioning, use a dual amplifier because two single amplifiers could have slightly different chopping frequencies that can interact and cause additional IMD.

Matching Input Source Impedance

Transient current glitches interacting with input source impedance can cause differential voltage errors, potentially resulting in additional artifacts at multiples of the chopping frequency. Figure 10 shows spikes in the noise density plot of the ADA4522 with mismatched source resistance (bottom). To mitigate this potential source of error, the system designer should ensure that each input of a chopped amplifier sees the same impedance (top).

Figure 10. Noise with matched (top) and mismatched (bottom) input source resistance in the ADA4522.

IMD and Aliasing Artifacts

When using a chopping amplifier, the input signal can mix with the chopping frequency, fCHOP, to create IMD at fIN ± fCHOP, fIN ± 2fCHOP, 2fIN ± fCHOP, … These IMD products can appear in the band of interest especially as fIN approaches the chopping frequency. To eliminate this issue, select a zero-drift amplifier that has a chopping frequency much greater than the input signal bandwidth and ensure that interferers at frequencies close to fCHOP are filtered before this amplifier stage.

Chopping artifacts can also be aliased when sampling an amplifier output with an ADC. Figure 11 shows an example IMD product resulting from the aliasing of the glitch frequency when the ADC takes a sample. These IMD products depend on glitch and ripple magnitudes and can vary from part to part. When designing a signal chain, it is necessary to include antialiasing filters before the ADC to reduce this IMD.

Figure 11. An example of IMD where the ADC samples a glitch and causes alias at fSAMPLE – 2fCHOP.

Filtering the Chopping Artifacts

At the system level, the single most effective way to deal with these high frequency artifacts is by filtering. An LPF between the zero-drift amplifier and the ADC reduces chopping artifacts and avoids aliasing. For this reason, amplifiers with a higher chopping frequency relax the requirements of an LPF and allow for wider signal bandwidth.

As an example, Figure 13 shows the effects of mitigating chopping artifacts with the ADA4522 using various techniques shown in Figure 12: increasing the closed-loop gain, postfiltering, and using a capacitor in parallel with the feedback resistor.8

Figure 12. Amplifier configurations to filter artifacts.
Figure 13. ADA4522 NSD using the first-order filters methods shown at top: (L) Increasing the gain reduces the amplifier’s bandwidth, which filters the noise peaks, (R) using an RC filter.

Depending on how much out of band rejection your system needs, a higher order active filter may be required. ADI has many resources to help with filter design including the multiple feedback filter tutorial and the online filter design tool.

Knowing the frequencies where chopping artifacts occur can help to create the required filter. Table 1 shows the locations of AC artifacts caused by zero-drift amplifiers.

Table 1. Summary of AC Chopping Artifact Locations
Artifact Description Location
Ripple fCHOP, 3fCHOP, 5fCHOP, …
Glitch 2fCHOP, 4fCHOP, 6fCHOP, …
Amplifier IMD fIN ± fCHOP, fIN ± 2fCHOP, 2fIN ± fCHOP, …


By understanding high frequency artifacts in zero-drift amplifiers, system designers can be more confident in using zero-drift op amps for their wider bandwidth applications. These system design considerations include:

  • Matching source input impedance seen by a zero-drift amplifier’s inputs
  • Using a dual amplifier for differential signal conditioning
  • Finding the frequency of artifacts in the data sheet noise spectrum
  • Designing a filter such that it reduces the impact of high frequency artifacts caused by dynamic offset reduction techniques
  • Understanding and planning for high frequency artifacts in the frequency domain


1Yoshinori Kusuda. “Reducing Switching Artifacts in Chopper Amplifiers.” Delft University of Technology, the Netherlands, May 2018.

2Christian Enz and Gabor C. Temes. “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization.” Proceedings of the IEEE, Vol. 84, No. 11, November 1996.

3Boris Murmann. EE315A: VLSI Signal Conditioning Circuits: Chaper 7, Precision Analog Circuit Techniques. Stanford University, 2014.

4James Bryant. “Multipliers vs. Modulators.” Analog Dialogue, Vol. 47, June 2013.

5A. T. K. Tang. “A 3/spl mu/V Offset Operational Amplifier with 20nV//spl radic/Hz Input Noise PSD at DC Employing Both Chopping and Autozeroing.” IEEE, February 2002.

6Michiel Pertijs and Wilko J. Kindt. “A 140 dB-CMRR Current-Feedback Instrumentation Amplifier Employing Ping-Pong Auto-Zeroing and Chopping.” IEEE Journal of Solid-State Circuits, Vol. 45, No. 10, October 2010.

7Johan F. Witte, Kofi A. A. Makinwa, and Johan H. Huijsing. “A CMOS Chopper Offset-Stabilized Opamp.” IEEE Journal of Solid-State Circuits, Vol. 42, No. 7, July 2007.

8Yoshinori Kusuda and Vicky Wong. “Zero-Drift Amplifiers: Now Easy to Use in High Precision Circuits.” Analog Dialogue, Vol. 49, July 2015.

ADA4523 data sheet. Analog Devices, Inc., April 2020.

AD7768-1 data sheet. Analog Devices, Inc., May 2019.

Kusuda, Yoshinori. “Analysis of Input Current Noise with Even Harmonics Folding Effect in a Chopper Op Amp.” Analog Dialogue, Vol. 53, May 2019.

Simon Basilico

Simon Basilico

Simon Basilico is a design engineer in the Precision Signal Chain Group based in Santa Clara, CA. Simon’s focus is on precision signal chains including both integrated mixed-signal designs and system in package solutions. He joined Analog Devices in 2015 after receiving his B.S. and M.S. in electrical engineering from Stanford University.