CN0383

RTD Introduction

RTDs are frequently used sensors for temperature measurements. A RTD is made from a pure metal (examples include platinum, nickel, or copper), which has a predictable change in resistance as the temperature changes and can typically measure up to +850°C. RTDs are capable of high accuracy and good stability when compared with other types of temperature sensors such as thermistors, thermocouples, and semiconductor (IC) temperature sensors. The most widely used RTDs are platinum Pt100 and Pt1000. These sensors are categorized by their nominal resistance at 0°C. There are several industry standards that define the tolerance and accuracy limits of a Platinum RTD sensor.

For the circuit in Figure 1, a Class B Pt100 RTD sensor was used which measures from −200°C to +600°C. The resistance of a Class B Pt100 RTD is typically 100 Ω at 0°C and has a typical temperature coefficient of ~0.385 Ω/°C (see Figure 2) and a tolerance of ±0.3°C at 0°C. Any temperature above or below the RTD calibrated temperature (0°C) has a wider tolerance band and lower accuracy. A Pt1000 RTD is also available in a similar range and tolerances. However, the resistance value for a Pt1000 RTD is higher by a factor of ten compared with the resistance value of the Pt100 sensor.

The three types of RTD configurations commonly used in RTD measurement applications are 2-wire, 3-wire, and 4-wire. A 2-wire configuration is the simplest. However, in this configuration, the lead resistance adds error because this resistance is in series with the RTD and cannot be compensated for. Thus, 2-wire RTDs are used when lead wires are short, minimizing lead resistance effects on accuracy. The resistance of long wire lengths can be compensated for with a 3-wire connection using two excitation currents, while the error due to the resistance of long wire lengths is near eliminated using the 4-wire connection. Therefore, a 4-wire configuration results in the best performance.

However, a 3-wire RTD requires only three connections to the RTD, which is useful in designs where the connector size is minimized (three connection terminal required vs. the 4-wire terminal for a 4-wire RTD).

RTD Transfer Function

From the specification of the PT100 RTD, the resistance changes by approximately 0.385 Ω/°C. This relationship can be used as a quick method to get an approximate temperature of the RTD. This method has inaccuracies due to the temperature coefficient of the RTD changing slightly over the temperature range. However, it can be a useful method to quickly check the temperature.

To calculate the approximate temperature, use Equation 1, where the resistance of the RTD is 100 Ω at 0°C.

The RTD transfer function, known as the Callender-Van Dusen equation, gives a more accurate result. It is made up of two distinct polynomial equations. Use Equation 2 for temperatures less than 0°C, and use Equation 3 for temperatures greater than 0°C.

The equation for temperature (T) ≤ 0°C follows:

The equation for T ≥ 0°C follows:

where:
R_RTD(T) is the RTD resistance at temperature (T).
R0 is the RTD resistance at 0°C (in this case, R0 = 100 Ω).
A = 3.9083 × 10⁻³.
T is the RTD temperature (°C).
B = −5.775 × 10⁻⁷.
C = −4.183 × 10⁻¹².

There are many different ways to determine the temperature as a function of the RTD resistance given the transfer function in Equation 2 and Equation 3. For this circuit note, the direct mathematical method is chosen because of its accuracy. Using Equation 3, the temperature can be calculated as

where r is the RTD resistance, and the other variables are as defined previously.

This method works well for temperatures ≥0°C. To calculate the RTD temperature for temperatures below 0°C, a best fit polynomial expression is required. The polynomial used in this circuit note is a fifth-order polynomial, as shown in Equation 5.

RTD Measurements

To accurately measure the RTD resistance, a low level voltage is generated across the R_RTD by a constant excitation current source. This low level voltage can then be amplified by the on-board PGA of the ADC and is then converted to a precision digital representation using the 24-bit Σ-Δ ADC. Errors in the current source can be easily cancelled by referring the measurement to the voltage across a precision reference resistor (R_REF) that is driven with the same current source, thereby resulting in a ratiometric measurement result.

The general expression to calculate the RTD resistance (R), where the ADC is operating in unipolar mode, is given by

The general expression to calculate the RTD resistance (R), where the ADC is operating in bipolar mode, is given by

where:
CODE is the ADC code.
R_REF is the reference resistor.
N is the resolution of the ADC (24, in this case).
G is the selected gain.

As an example, the code read back from the AD7124-4/AD7124-8 is configured in bipolar mode for a temperature set to 25°C is 11270065. Converting this code to a resistance using Equation 7 results in the following:

Linearization using Equation 4 gives a temperature of 24.921°C.

As a second example, the code read back from the AD7124-4/AD7124-8 is configured in bipolar mode for a temperature set to −25°C is 10757779.

Converting this code to a resistance results in the following:

Linearization using Equation 5 gives a temperature of −24.982°C.

RTD Design Considerations

The following sections describes the general guidelines in designing circuit components and setting the required operation of the RTD measurement circuit shown in Figure 1.

The RTD Wiring Configuration section covers the different circuit techniques and connections used for each wiring configuration. All considerations and calculations used for each circuit configuration shown can be refer to the RTD Wiring Configuration section.

ADC

Along with the RTD sensor specification, the accuracy of the system depends on the performance of the ADC. The AD7124-4/AD7124-8 provide an integrated solution for RTD measurement. These devices can achieve high resolution, low nonlinearity, and low noise performance as well as high 50 Hz and 60 Hz rejection. The AD7124-4/AD7124-8 consist of on-chip programmable excitation current sources, reference buffers, and a low noise PGA that amplifies the small signal from the RTD, thus allowing direct interface with the sensor and minimizing the required external circuitry.

Power Supplies

The AD7124-4/AD7124-8 have separate analog and digital power supplies. The digital power supply, IOV_DD, is independent of the analog power supply and can be from 1.65 V to 3.6 V referenced to DGND. The analog power supply, AV_DD, is referred to AV_SS and has a range of 2.7 V to 3.6 V for low and mid power modes and a range of 2.9 V to 3.6 V for full power mode. The circuits shown in Figure 1 operate from a single supply. Therefore, AV_SS and DGND are connected together, and only one ground plane is used. The AV_DD and IOV_DD voltages are generated separately using ADP150 voltage regulators. The AV_DD voltage is set to 3.3 V, and the IOV_DD voltage is set to 1.8 V, using the ADP150 regulators. Using separate regulators ensures the lowest noise.

The power mode selection depends on the current budget allotment for the end application. If the application requires a much higher output data rate and better noise performance, the devices can be programmed in full power mode. For any portable application, low power components must be used, and for some industrial applications, the complete system is powered from the 4 mA to 20 mA loop so that a current budget of 4 mA maximum is allowed. For this type of application, the devices can be programmed in mid or low power mode.

Excitation Current and Output Compliance

The AD7124-4/AD7124-8 offer two such excitation current sources that are register programmable from 50 μA to 1 mA. The selection of excitation currents affects the RTD input voltage range, gain selection, and the reference and reference buffer headroom resistors. Maximize the possible excitation current used for better performance. However, the output compliance of the excitation current source must also be considered when making RTD measurements. For this circuit, 500 μA is selected, which has an output compliance voltage of AV_DD − 0.37 V. The AV_DD supply voltage for this circuit is 3.3 V. Therefore, the output compliance level for the excitation current source must be less than 2.93 V.

Using the Callender-Van Dusen equation, with an RTD temperature range of −200°C to +600°C, the voltage generated across the RTD using a 500 μA excitation current is approximately 9.26 mV to 156.85 mV.

Analog Inputs and Gain Selection

Signals from the sensor are quite small and must be amplified by a low noise gain stage. RTDs vary from tens of millivolts to hundreds of millivolts depending on the RTD chosen. An ADC with an internal PGA can be used to avoid the need for any external amplifier components. The AD7124-4/AD7124-8 consist of an on-chip, low noise PGA that amplifies the small signal from the RTD with a gain programmable from 1 to 128, thus allowing direct interface with the sensor. The gain stage has high input impedance and limits the input leakage current to 3.3 nA typical for full power mode and 1 nA typical for low power mode. If the on-chip excitation current is programmed to 500 μA, at a maximum temperature of 600°C, the voltage generated across the RTD is approximately 156.85 mV.

To ensure that the maximum range of the AD7124-4/AD7124-8 is used, the PGA gain is programmed to a gain of 16. The PGA amplifies the maximum RTD sensor output voltage to 2.5096 V.

Reference and Reference Buffer Headroom

For the circuit shown in Figure 1, the reference inputs used are REFIN+ and REFIN1−. The current through the RTD also flows through the precision reference resistor that generates the reference voltage. The voltage generated across this precision reference resistor is ratiometric to the voltage across the RTD. Therefore, any variations seen in the excitation current are removed.

The reference is continuously sampled by a switched capacitor. In this circuit, the reference input is driven by an external reference resistor. Note that large RC values can cause gain errors in measurements. Enabling the internal reference buffers allow a wide range of resistor values or EMC filtering without adding any error. Because the reference buffers are enabled, it is necessary to ensure that the headroom required for correct operation is met.

The reference voltage must be within the minimum and maximum reference voltages for operation. The AD7124-4/AD7124-8 can operate with a reference from 0.5 V to (AV_DD − AV_SS). The reference buffers require a headroom of at least 0.1 V above and below the supply rails.

Using the excitation current (I_EXC) of 500 μA, and the amplified voltage of the ADC (V_{RTD MAX}), the reference resistor value is

Therefore, a 5.11 kΩ resistor is chosen, which gives a reference voltage (V_REF) of

The headroom of 0.125 V (500 μA × 250 Ω) is provided by the 250 Ω resistor to ground, as shown in Figure 1 (see the 2-wire and 4-wire sections). This headroom resistor is required if the reference resistors are setup at the low side of the circuit. If the reference resistor is on the high side, as shown in Figure 1 (see the 3-wire section), the headroom requirements for the reference buffers are met for higher RTD temperature measurement (greater than 300°C). Therefore, additional headroom resistors are not required for this measurement configuration. However, for lower RTD temperature measurement (less than 300°C), the headroom of 0.1 V (500 μA × 100 Ω) is provided by the 100 Ω resistor to ground, as shown in Figure 1 (see the 3-wire section).

From the previous discussions, the AV_DD supply voltage for this circuit is 3.3 V. Therefore, the output compliance level for the excitation current source must be less than 2.93 V, and the reference voltage must be within the 0 V to 3.3 V range.

This specification is met because the maximum voltage on the AIN0 (IOUT0) pin is the voltage across the precision reference resistor plus the voltage across the RTD plus the voltage across the headroom resistor:

Digital and Analog Filtering

Differential (~800 Hz cutoff) and common-mode (~16 kHz cutoff) filters are implemented at the analog inputs as well as at the reference inputs. This filtering is required to reject any interference at the modulator frequency and also at any multiples of this frequency.

To get a high precision measurement from the sensor, it is also important that the sensor noise and accuracy dominates the overall system error. Noise can impact the system accuracy because it limits the smallest possible change in the signal level of the sensor that the ADC can recognize and, therefore, directly impacts the resolution of the system. It may also have an impact when performing calibration and accurate and repeatable measurement results are required. Thus, it is important that the ADC resolution and noise performance is better than the sensor noise and resolution.

The AD7124-4/AD7124-8 offer a great deal of on-chip digital filtering flexibility. Several filter options are available. The filter option selected has an effect on the output data rate, settling time, as well as the 50 Hz and 60 Hz rejection. For this circuit note, the sinc4 filter and the post filter are implemented. The sinc4 filter is used because it has excellent noise performance across the output data rates range, as well as excellent 50 Hz and 60 Hz rejection. The post filter is used to provide simultaneous 50 Hz and 60 Hz rejection with a 40 ms settling time.

The corresponding system rms noise values are shown in Table 1, and Table 2 also show the noise performance when the ADC analog inputs are shorted for the same filter, gain, and output data rate settings. The noise measured is higher when the RTD is connected because the RTD has some noise.

Calibration

The AD7124-4/AD7124-8 provide different calibration modes that can eliminate offset and gain errors. For this circuit note, internal zero-scale calibration as well as internal full-scale calibration were used. Note that these calibrations remove the ADC gain and offset errors only, not the gain and offset errors created by the external circuitry.

Diagnostics

The AD7124-4/AD7124-8 have on-chip diagnostics that can check that the voltage level on the analog pins are within the specified operating range. All analog input pins (AINx) can be separately checked for overvoltages and undervoltages, as well as ADC saturation. An overvoltage is flagged when the voltage on the analog input exceeds AV_DD, while an undervoltage is flagged when the voltage on the analog input goes below AV_SS. The extensive diagnostic functionality of the system also includes a CRC on the SPI bus and signal chain checks, which lead to a more robust solution. These diagnostics reduce the need for external components to implement diagnostics, resulting in smaller solution size, reduced design cycle times, and cost savings. The failure mode effects and diagnostic analysis (FMEDA) of a typical application has shown a safe failure fraction (SFF) greater than 90% according to the IEC 61508 standard.

RTD Wiring Configuration

The AD7124-4 can be configured for 4 differential or 7 pseudo differential input channels, and the AD7124-8 can be configured for 8 differential or 15 pseudo differential channels. It uses a flexible multiplexer allowing the ease of sensor connections and accommodating multiple 2-wire, 3-wire, and 4-wire RTDs on the same board (see Table 3).

The following sections describe the circuit and ADC configuration for the three RTD wirings shown in Figure 1. These sections cover a deeper understanding and focus on each RTD configuration design, considering the different techniques needed to interface a RTD to an ADC, along with requirements from the ADC, such as ADC configuration, sensor connection, output compliance, and reference and gain selection, which was previously discussed in RTD Design Considerations section. Each section also discusses the results, lessons learned, and take aways from using each configuration with a single RTD sensor.

2-Wire RTD Configuration

A 2-wire RTD configuration is the simplest configuration. Three analog pins from the AD7124-4/AD7124-8 are used to implement the 2-wire configuration: AIN0, AIN2, and AIN3. AIN2 and AIN3 are configured as a fully differential input channel and are used for sensing the voltage across the RTD. The reference inputs used are REFIN+ and REFIN1−. A low-side reference resistor was used, therefore a reference headroom resistor is required.

For the 2-wire configuration, one excitation current source is required. The excitation current source used to excite the RTD, reference, and headroom resistors is generated from AVDD and is directed to AIN0 (IOUT0). The same current flows through the RTD and precision reference resistor that generates the reference voltage, thus ensuring a ratiometric measurement.

For the 2-wire configuration, the AIN0 and AIN2 pins must be shorted at the connector. AIN3 and REFIN1(+) must also be shorted at the connector. The analog pins and their configuration are shown in greater detail in Figure 3. Selection of reference and headroom resistance was based on the RTD Design Considerations section along with the excitation, gain, and digital filtering.

The AD7124-4/AD7124-8 configuration for the 2-wire RTD measurement is as follows:

• Differential input: the positive analog input (AIN+) = AIN2 and the negative analog input (AIN−) = AIN3
• Excitation current: IOUT0 = AIN0 = 500 μA
• Gain = 16
• 5.11 kΩ precision reference resistor
• 250 Ω headroom resistor
• Digital filtering (sinc4, 50 SPS and post filter, 25 SPS)

For the RTD circuit shown in Figure 3, data was gathered for different digital filter and power mode configurations of the AD7124-4/AD7124-8, namely the sinc4 filter operating in full power mode and the post filter operating in low power mode as discussed in the Digital and Analog Filtering section.

The typical noise free code resolution of the 2-wire system is 18.09 bits for full power mode with the sinc4 filter selected and 17.05 bits for low power mode with the post filter, which is equivalent to around 0.0029°C and 0.0059°C error variation on each temperature measurements. Figure 4 and Figure 5 show the noise distribution when a 2-wire RTD is connected.

With a two-point calibration and linearization, the overall 2-wire system accuracy over the −50°C to +165°C temperature range is better than ±1°C. For each temperature, the corresponding voltage across the RTD was measured using the AD7124-4/AD7124-8 as outlined previously. This voltage was then converted to a resistance, linearized, and converted to a temperature as outlined in the RTD Transfer Function section.

Figure 6 and Figure 7 show the resulting error (set temperature minus measured temperature). For each RTD temperature setting, the AD7124-4/AD7124-8 are kept at 25°C. As shown, the error is close to the RTD envelope at 0°C, and the lead resistance adds error. Above or below 0°C, the measurement is well within the RTD specification. Figure 6 and Figure 7 also show the deviation of the RTD error across different AD7124-4/AD7124-8 temperature settings. For each AD7124-4/AD7124-8 temperature setting, an internal zero-scale and full-scale calibration is carried out. As shown in Figure 6 and Figure 7, the overall error is again close to the envelope of the RTD at 0°C for the 2-wire measurement. For all other temperatures, the error of the RTD is well within the expected error of the Class B RTD for all temperature settings of the AD7124-4/AD7124-8.

Figure 8 and Figure 9 show the error in the measured RTD temperature for a one time, internal zero-scale and full-scale calibration carried out at 25°C. Figure 8 and Figure 9 show the one time calibration at 25°C or that the calibration at each individual temperature of the AD7124-4/AD7124-8 has degraded performance when the AD7124-4/ADA7124-8 are at higher temperatures due to the lead resistance errors.

Lead Resistance Consideration in 2-Wire RTD

A 2-wire RTD implementation gives an error that is much closer to the lower limit of the error bound. The reason behind this is that the measurement of the 2-wire RTD is always higher than the actual measurement due to its lead resistance. For the 2-wire RTD configuration, lead resistances, RL1 and RL2, in Figure 3 add resistance in series with the RTD element, thus increasing the voltage measurement across the ADC inputs, resulting in a higher measured temperature vs. the applied temperature.

For example, the nominal resistance of 24 AWG copper wire is 0.026 Ω/foot (0.08 Ω/meter). If the RTD has leads of length of 25 foot, it has a total lead resistance (RL1 and RL2) equivalent to 1.3 Ω. The RTD temperature coefficient is approximately 0.385 Ω/°C. Therefore, 1.3 Ω lead resistance produces an error of (1.3/0.385) = 3.38°C error due to lead resistance.

The only way to compensate for this error is to manually calibrate the offset, which is possible as long as the lead wire resistance remains constant. However, the lead resistance also changes with temperature. Therefore, as the ambient temperature changes, the lead resistance also changes, which introduces some degree of error in the temperature measurements. If the wire is long, this source of error is significant.

Therefore, a 2-wire RTD configuration is mostly used in applications where lead wires are short or when using a high resistance sensor (for example, PT1000), minimizing the lead resistance effect on the accuracy.

3-Wire RTD Configuration

The 3-wire RTD configuration is the most commonly used configuration because of its three pins and accuracy advantage over the other configurations.

For the circuit shown in Figure 10, four analog pins from the AD7124-4/AD7124-8 are used to implement the 3-wire measurement: AIN0, AIN1, AIN2, and AIN3. AIN2 and AIN3 are configured as a fully differential input channel and are used for sensing the voltage across the Pt100 RTD sensor. The excitation current source used to excite the RTD is generated from AVDD and is directed to AIN0. An identical current is directed to AIN1 and flows through the RL2 lead resistance, thereby generating a voltage that cancels the voltage dropped across the RL1 lead resistance. The reference inputs used are REFIN1+ and REFIN−. A ratiometric configuration is again used, eliminating any errors due to excitation current variation.

The analog pins and their configuration are shown in greater detail in Figure 10.

The AD7124-4/AD7124-8 configuration for the 3-wire RTD measurement is as follows:

• Differential input: AIN+ = AIN2 and AIN− = AIN3
• Excitation current: IOUT0 = AIN0 = 500 μA
• Excitation current: IOUT1 = AIN1 = 500 μA
• Gain = 16
• 5.11 kΩ precision reference resistor
• 100 Ω headroom resistor
• Digital filtering (sinc4, 50 SPS and post filter, 25 SPS)

Selection of the reference, excitation current, gain, and digital filtering were based on the RTD Design Considerations section.

With the PGA enabled, the analog input buffers are automatically enabled. The PGA allows voltages on the input pins to be as low as AV_SS. Therefore, headroom resistors are not required for the analog input pins. The reference buffers are also enabled. As the reference resistor is on the high side, the headroom requirements for the reference buffers are met for higher RTD temperature measurement (greater than 300°C). Therefore, additional headroom resistors are not required for this measurement configuration. However, for lower RTD temperature measurement (less than 300°C), reference headroom resistors are required.

For the 3-wire RTD measurement, two precision excitation current sources are required that provide an simple way to cancel the lead resistance errors produced by RL1 and RL2. Note that the RL3 lead resistance does not affect the measurement accuracy. For the 3-wire RTD configuration shown in Figure 10, the reference resistor is placed on the high side of the RTD. For this setup, one excitation current flows through both the reference resistor and the RTD, and the second current flows through the RL2 lead resistance and develops a voltage that cancels the voltage dropped across the RL1 lead resistance. Because only one excitation current generates the reference voltage to REFIN1+ and REFIN− and also generates the voltage across the RTD, the current source accuracy, mismatch, and mismatch drift have a minimal effect on the ADC transfer function.

3-Wire RTD Results

For the RTD circuit shown in Figure 10, data was gathered for different digital filter and power mode configurations of the AD7124-4/AD7124-8, namely the sinc4 filter operating in full power mode and the post filter operating in low power mode as discussed in Digital and Analog Filtering section.

The typical noise free code resolution of the 3-wire system is 17.9 bits for full power mode with the sinc4 filter selected and 16.8 bits for low power mode with the post filter, which is equivalent to around 0.0033°C and 0.0070°C error variation on each temperature measurements. Figure 11 and Figure 12 show the noise distribution when a 3-wire RTD is connected.

With a two-point calibration and linearization, the overall 3-wire system accuracy over the −50°C to +200°C temperature range is better than ±1°C. For each temperature, the corresponding voltage across the RTD was measured using the AD7124-4/AD7124-8 as outlined previously. This voltage was then converted to a resistance, linearized, and converted to a temperature as outlined in the RTD Transfer Function section.

Figure 13 and Figure 14 show the resulting error (set temperature minus measured temperature). For each RTD temperature setting, the AD7124-4/AD7124-8 are kept at 25°C, and the error is well within the error window of the Pt100 Class B. Figure 13 and Figure 14 also show the deviation of the RTD error across different AD7124-4/AD7124-8 temperature settings. For each AD7124-4/AD7124-8 temperature setting, an internal zero-scale and full-scale calibration is carried out. As shown in Figure 13 and Figure 14, the overall error is well within the allowed error budget.

Figure 15 and Figure 16 show the error in the measured RTD temperature for a one time, internal zero-scale and full-scale calibration carried out at 25°C. Figure 15 and Figure 16 show the one time calibration at 25°C and that the calibration at each individual temperature of the AD7124-4/AD7124-8 results in similar performance.

Lead Resistance Consideration for 3-Wire RTD

For the 3-wire measurement, the second excitation current actively compensates for the lead resistance. Therefore, any changes with the lead resistance over temperature also no longer affect the measurement.

However, the accuracy of the lead resistance compensation depends on the resistance of each of the leads being equal (specifically, RL1 = RL2). The voltage dropped across RL3 does not affect the voltage measured across the RTD element. Therefore, RL3 does not introduce error in the measurement for the circuits described in this circuit note.

So again, with a 24 AWG copper wire of 50 foot length, the resistance is 1.3 Ω. A 10% error in matching produces a 0.13 Ω error in the RTD measurement, assuming perfectly matched compensation and excitation currents. The RTD temperature coefficient is approximately 0.385 Ω/°C. Therefore, the 0.13 Ω lead resistance mismatch measurement error translates into approximately (0.13/0.385) = 0.337°C error due to the lead resistance mismatch. Therefore, for accurate 3-wire measurements, the matching characteristics of the connecting cables must be known precisely.

Assuming perfect lead resistance matching, mismatches in the excitation currents (IOUT0 and IOUT1) produce an error that is proportional to the total lead resistance. For instance, a 0.5% mismatch in the excitation currents (typical specification for the AD7124-4/AD7124-8) produces a corresponding 0.5% error in the RTD resistance measurement. The nominal Pt100 RTD resistance temperature coefficient is 0.385 Ω/°C, which is equivalent to a temperature change of 2.6°C/Ω. A 0.5% error in the resistance measurement gives an RTD measurement error of (0.005 × 2.6) = 0.013°C/Ω. For a lead resistance of 10 Ω (~400 feet of 24 AWG copper wire), the error due to the mismatch in currents is only 0.13°C.

The previous discussion illustrates that, in most practical applications, the mismatch in the lead resistances creates much more error than the 0.5% mismatch in excitation currents.

In the Figure 10 circuit, the precision reference resistor was placed on the high side. The high-side configuration works well for systems using a single RTD. When multiple 3-wire RTDs are used, it is better to place the precision resistor on the low side because only a single reference resistor is required.

Current Source Mismatch and Mismatch Drift

With the reference resistor on the low side, better excitation current matching is required (3-wire RTD). The following two different techniques can minimize the errors due to mismatches in the currents:

• Chopping the excitation currents
• Calibration by measuring the excitation currents

Chopping the Excitation Currents

The crosspoint multiplexer on the AD7124-4/AD7124-8 allows simple implementation of the chopping configuration. Figure 17 shows the 3-wire RTD configuration with the precision 5.11 kΩ reference resistor connected to the low side of the Pt100 RTD. For this configuration, the current source used as well as the gain must be reconsidered. Both IOUT0 and IOUT1 are set to 250 μA. Selecting this current ensures that the circuit complies with the output compliance of the current sources as well as the reference voltage generated across the precision resistor. To ensure that the full range of the ADC is used, the gain of the PGA was set to 32. A resistor is required on the low side of the reference resistor because the reference buffers are enabled and require headroom (100 mV).

To chop the currents, a measurement of the RTD voltage is taken when IOUT0 is connected to AIN0, and IOUT1 is connected to AIN1, as shown in Figure 17. A second measurement of the voltage across the RTD is then taken when the currents are swapped, that is, when IOUT1 is connected to AIN0, and IOUT1 is connected to AIN1. The average of these two voltage measurements is then used in the overall calculation of the RTD resistance, and subsequently, the temperature is calculated using Equation 2 through Equation 7. The chopping method greatly reduces any effects of excitation current mismatch and mismatch drift. However, there is an impact on the throughput rate because two measurements are required.

Measurement data using the excitation current chopping method was gathered, and the corresponding Pt100 temperature error recorded as shown in Figure 18. For all RTD temperatures measured, the temperature error is within the error band of the Pt100 RTD for different ambient temperatures of the AD7124-4/AD7124-8. These results show that chopping the excitation current gives results that are comparable to the data gathered with the high-side precision reference resistor configuration.

Calibration by Measuring the Excitation Currents

The configuration for calibrating the 3-wire system by measuring the excitation currents is shown in Figure 19. For this configuration, the precision reference resistor is connected to the low side of the RTD. This configuration is similar to that used for chopping the currents, where both the currents are set to 250 μA, and the PGA gain is set to 32. However, the main difference is that an additional differential input channel is required. The additional input channel enables the measurement of the two excitation currents. The measurement is implemented by measuring the voltage drop across the precision reference resistor with respect to the internal reference when each of the excitation currents is individually enabled. The measured voltage is then converted to a current based on the value of the precision reference resistor value, which is subsequently used to calculate the ratio of the currents, and then used to calibrate the mismatch.

Figure 20 shows the calibrated temperature error in the RTD measurements. The results show that the RTD error is within the expected error band of the RTD, where the error in measurement is close to the error profile of the RTD itself. To ensure accurate results, calibration of the currents must take place at regular intervals over time.

Multiple 3-Wire RTD Configuration

The AD7124-4/AD7124-8 can be used as a measurement system for multiple 3-wire RTDs. When the ADC is configured in multiple channels, the ADC automatically sequences through the enabled channels, performing one conversion on each channel. When the channel changes, the complete settling time of the filter is required to generate the conversion, thus affecting the overall throughput rate. Therefore, it is also important to consider the latency of the digital filter when muxing between multiple sensors. The excitation currents are outside the sequencer, which means users must write to the device to turn on or turn off the excitation currents and/or direct these currents to specific channels. However, the turn-on time is dependent on the external RC values connected to the ADC. Therefore, the actual turn-on or turn-off time is outside the control of Analog Devices, Inc., and must also be considered when taking measurements.

To configure a single 3-wire RTD configuration, refer to the 3-Wire RTD Configuration section.

The AD7124-4 can connect two 3-wire RTDs, whereas the AD7124-8 can connect up to four 3-wire RTDs.

When multiple 3-wire RTDs are used, it is better to place the precision resistor on the low side because only a single reference resistor is required. As a minimum, each 3-wire RTD requires four pins of the AD7124-4/AD7124-8, two pins for the excitation currents and two pins for the analog inputs. Therefore, the following steps needed to measure an RTD voltage are:

1. Set the external reference to REFIN1+ and REFIN1−.
2. Enable the analog input channel that has the RTD connected across its input.

As an example, four 3-wire RTDs were connected to the AD7124-8 as shown in Figure 21. One 3-wire RTD is connected across the AIN2 and AIN3 analog input pins (Channel 0 configuration), where the excitation currents come from AIN0 and AIN1, and a second 3-wire RTD is also shown connected across the AIN4 and AIN5 analog input pins (Channel 1 configuration), where AIN6 and AIN7 are used for the excitation currents and so on. All of the RTD configurations are detailed in Table 4.

Temperature measurements can then be carried out on each RTD in turn by using the following steps:

1. Enable the IOUT0 and IOUT1 currents to the RTD for measuring.
2. Direct IOUT0 to AIN0 and IOUT1 to AIN1. The voltage is measured on Channel 0 (AIN2 and AIN3). Therefore, Channel 0 must be enabled. All other channels are disabled for this measurement.
3. Disable Channel 0, enable Channel 1, and direct the IOUT0 and IOUT1 currents to AIN6 and AIN7. The voltage is then measured on Channel 1 (AIN4 and AIN5). Note that the EVAL-AD7124-4SDZ/EVAL-AD7124-8SDZ have an on-board thermistor across AIN4 and AIN5. When using AIN4 and AIN5, remove this thermistor (R28).
4. Repeat this sequence until all RTDs are measured.

4-Wire RTD Configuration

A 4-wire RTD configuration is the most straight forward and most accurate configuration. The only complexity in this configuration is the size of the 4-pin connector as compared to the other two configurations which took up most of the PCB area. Three analog pins on the AD7124-4/AD7124-8 are used to implement the 4-wire RTD configuration: AIN0, AIN2, and AIN3. AIN2 and AIN3 are configured as a fully differential input channel and are used for sensing the voltage across the RTD. The reference inputs used are REFIN1+ and REFIN−. A low-side reference resistor was used, therefore a reference headroom resistor is required.

For the 4-wire RTD configuration, one excitation current source is required. The excitation current source used to excite the RTD, reference, and headroom resistors is generated from AV_DD and is directed to AIN0 (IOUT0). The same current flows through the RTD and precision reference resistor that generates the reference voltage, thus ensuring a ratiometric measurement.

The analog pins and their configuration are shown in greater detail in Figure 22. Selection of reference and headroom resistance were based on the RTD Design Considerations section along with the excitation, gain, and digital filtering.

The AD7124-4/AD7124-8 configuration for the 4-wire RTD measurement is as follows:

• Differential input: AIN+ = AIN2 and AIN− = AIN3
• Excitation current: IOUT0 = AIN0 = 500 μA
• Gain = 16
• 5.11 kΩ precision reference resistor
• 250 Ω headroom resistor
• Digital filtering (sinc4, 50 SPS and post filter, 25 SPS)

For the RTD circuit shown in Figure 22, data was gathered for the different digital filter and power mode configurations of the AD7124-4/AD7124-8, namely the sinc4 filter operating in full power mode and the post filter operating in low power mode as discussed in Digital and Analog Filtering section.

The typical noise free code resolution of the 4-wire system is 17.9 bits for full power mode with the sinc4 filter selected and 16.8 bits for low power mode with the post filter, which is equivalent to around 0.0033°C and 0.0070°C error variation on each temperature measurements. Figure 23 and Figure 24 show the noise distribution when a 4-wire RTD is connected.

With a two-point calibration and linearization, the overall 4-wire system accuracy over the −50°C to +200°C temperature range is better than ±1°C. For each temperature, the corresponding voltage across the RTD was measured using the AD7124-4/AD7124-8 as outlined previously. This voltage was then converted to a resistance, linearized, and converted to a temperature as outlined in the RTD Transfer Function section.

Figure 25 and Figure 26 show the resulting error (set temperature minus measured temperature). For each RTD temperature setting, the AD7124-4/AD7124-8 is kept at 25°C, and the error is well within the error window of the Pt100 Class B. Figure 25 and Figure 26 also show the deviation of the RTD error across different AD7124-4/AD7124-8 temperature settings. For each AD7124-4/AD7124-8 temperature setting, an internal zero-scale and full-scale calibration is carried out. As shown in Figure 25 and Figure 26, the overall error is well within the allowed error budget.

Figure 27 and Figure 28 show the error in the measured RTD temperature for a one time, internal zero-scale and full-scale calibration carried out at 25°C. Figure 27 and Figure 28 show the one time calibration at 25°C and that the calibration at each individual temperature of the AD7124-4/AD7124-8 gives similar performances.

Lead Resistance Consideration in 4-Wire RTD

To fully compensate for lead wire resistance error, a 4-wire RTD configuration is recommended. Here, two additional wires are connected to both ends of the RTD, one pair delivers the current, and the other pair performs the voltage measurement so that any resistance in the lead wires does not have any effect on the measurement. Therefore, 4-wire RTDs give the most accurate measurements.

Multiple 2-Wire/4-Wire RTD Configuration

The AD7124-4/AD7124-8 can be used as a measurement system for multiple 2-wire/4-wire RTDs. When the ADC is configured in multiple channels, the ADC automatically sequences through the enabled channels, performing one conversion on each channel. When the channel changes, the complete settling time of the filter is required to generate the conversion, thus affecting the overall throughput rate. Therefore, it is also important to consider the latency of the digital filter when muxing between multiple sensors. The excitation currents are outside the sequencer, which means users must write to the device to turn on or turn off the excitation currents and/or direct these currents to specific channels. However, the turn-on time is dependent on the external RC values connected to the ADC. Therefore, the actual turn on or turn off time is outside the control of Analog Devices and must also be considered when taking measurements.

To configure a single 2-wire or 4-wire configuration, refer to the 2-Wire RTD Configuration section or the 4-Wire RTD Configuration section.

The AD7124-4 can connect two 2-wire/4-wire RTDs, whereas the AD7124-8 can connect up to five 2-wire/4-wire RTDs. The same reference input can be used for all RTDs, and one current source can be used to excite all RTDs. The current is directed to the top side of each of the RTDs in turn when the RTD temperature measurement is required. The cross multiplexer on the AD7124-4/AD7124-8 allows multiple channels to be configured separately, where each channel can be configured for different setups.

The steps needed to measure an RTD voltage are as follows:

• Set the external reference to REFIN1+ and REFIN1−.
• Enable the IOUT0 current to the RTD for measuring.
• Enable the analog input channel that has the RTD connected across its input.

As an example, five 2-wire/4-wire RTDs were connected to the AD7124-8 as shown in Figure 29 and Figure 30. One 2-wire/4-wire RTD is connected across the AIN2 and AIN3 analog input pins (Channel 0 configuration), where the excitation current comes from AIN0, a second 2-wire/4-wire RTD is also shown connected across the AIN4 and AIN5 analog input pins (Channel 1 configuration), where AIN1 is used for the excitation current, and so on. All of the RTD configurations are detailed in Table 5.

Temperature measurements were then carried out on each RTD in turn by using the following steps:

1. Direct IOUT0 to AIN0. The voltage is measured on Channel 0 (AIN2, AIN3). Therefore, Channel 0 must be enabled. All other channels are disabled for this measurement.
2. Disable Channel 0, enable Channel 1, and direct the IOUT0 current to AIN1. The voltage is then measured on Channel 1 (AIN4 and AIN5). Note that the EVAL-AD7124-4SDZ or the EVAL-AD7124-8SDZ have an on-board thermistor across AIN4 and AIN5. When using AIN4 and AIN5, remove this thermistor (R28).
3. Repeat this sequence until all RTDs are measured.