CN0295

The design provides a complete solution for the 4 mA-to-20 mA transmitter for pressure sensor measurements. The circuit has three critical stages: the sensor excitation drive, the sensor output amplifier, and the voltage to current converter.

The total current required by the circuit (neglecting the bridge drive current and the output current) is 5.23 mA (maximum) as shown in Table 1.

Excitation: Voltage Drive Configuration

Depending on the pressure sensor selected, either a voltage or current drive is required. The circuit uses one-fourth of the ADA4091-4 (U2A) with different configurations chosen by switching S1 to support either option. Figure 2 shows the configuration for the voltage drive with S1 in the position closest to the identifying marking (see complete circuit layouts and schematics in the CN0295 design support package: http://www.analog.com/CN0295-DesignSupport). The voltage drive is normally configured for a bridge drive voltage of 6 V by the gain of the stage, 1 + R5/R6. Other drive voltages can be obtained by changing the resistor ratio appropriately:

Note that the power supply voltage V_CC should be at least 0.2 V greater than the bridge drive voltage to allow sufficient headroom for U2A, the ADA4091-4

The ADA4091-4 op amp is chosen for the circuit because of its low current consumption (250 μA/amplifier), low offset voltage (250 μV), and rail-to-rail inputs and outputs.

The ADR02 is chosen for the 5 V reference because of its accuracy (A-Grade: 0.1%, B-Grade: 0.06%) and low quiescent current (0.8 mA).

Excitation: Current Drive Configuration

The circuit can be switched to the current drive configuration shown in Figure 3 by moving S1 to the position that is furthest away from the identifying marking.

In the current drive mode, the circuit is configured for R4 = 2.5 kΩ, and I_DRIVE = 2 mA. Lower or higher values of I_DRIVE can be obtained by using the following equation to select the value of R4:

The resulting drive voltage V_DRIVE is calculated from:

A headroom of 0.2 V is required for the V_CC supply, therefore:

Bridge Output Instrumentation Amplifier and Offset Circuit

The output of the bridge is filtered by a common-mode filter (4.02 kΩ, 1 nF) with a bandwidth of 39.6 kHz and a differential- mode filter (8.04 kΩ, 10 nF) with a bandwidth of 1.98 kHz.

The AD8226 is an ideal choice for the in-amp because of its low gain error (0.1%, B-grade), low offset (58 μV at G = 16, B-grade; 112 μV at G = 16, A-grade), excellent gain nonlinearity (75 ppm = 0.0075%), and rail-to-rail inputs and output.

The AD8226 instrumentation amplifier amplifies the 100 mV FS signal by a factor of 16 to 1.6 V using a gain setting resistor R3 = 3.28 kΩ. The relationship between the gain, G, and R3 is given by

For G = 16, R3 = 3.2933 kΩ. The nearest standard 0.05% value of 3.28 kΩ is chosen for R3, yielding a gain of G = 16.06, which introduces an overall gain error of +0.4%.

For a 0 V bridge output, the output loop current should be 4 mA. This is achieved by simply applying a +0.4 V offset to the REF input of the AD8226 in amp as shown in Figure 1. The +0.4 V is derived from the ADR02 5 V reference using divider resistors R7/R8 and buffering the voltage with U2B.

The ADR02 5 V reference is used to set the drive voltage or current to the bridge and to set the 4 mA zero offset. It has an initial accuracy of 0.06% (B-grade) and 10 μV p-p voltage noise. In addition, it operates on supply voltages up to 36 V and consumes less than 1 mA, making it an ideal choice for low power applications.

Voltage to Current Conversion

The 0 V to 100 mV input to the AD8226 generates an output swing at V_OUT of 0.4 V to 2.0 V. The buffer, U2C, applies this voltage across R13 that produces a corresponding current I13 of 0.4 mA to 2.0 mA. Transistor Q1 then mirrors the I₁₃ current to R12, and the resulting voltage is applied to R15, thereby developing the final loop current of 4 mA to 20 mA. Transistor Q1 should have a high gain of at least 300 to minimize the linearity error due to its base current.

The output transistor Q2 is a 40 V P-channel MOSFET power transistor capable of dissipating 0.75 W at 25°C. The worst-case power dissipation in the circuit is for an output current of 20 mA into a loop load resistance of 0 Ω with a V_CC supply of 36 V. Under these conditions the power dissipation of Q2 is 0.68 W. However, the power in Q2 can be significantly reduced by properly selecting V_CC so that it is at least 3 V greater than the maximum loop load voltage. This ensures sufficient headroom due to the voltage dropped across the sense resistor R15.

Voltage Supply Requirement

In order for the circuit to operate properly, the supply voltage, V_CC, must be greater than 7 V in order to provide sufficient headroom for the ADR02 voltage reference.

The minimum V_CC supply voltage is also dependent on the configuration of the drive circuit for the bridge. In the voltage drive mode with V_DRIVE = 6 V, the supply voltage V_CC must be greater than 6.2 V in order to maintain sufficient headroom for U2A (see Figure 2).

In the current drive mode, the supply voltage V_CC must be greater than 11.2 V in order to maintain sufficient headroom for U2A (see Figure 3).

The V_CC supply voltage is limited to 36 V maximum.

Error Analysis for Active Components

The maximum and rss errors due to the active components in the system for A- and B-grade levels of the AD8226 and the ADR02 are shown in Tables 2 and 3. Note that the ADA4091-2 op amp is only available in one grade level. 

Total Circuit Accuracy

A good approximation to the total error contributed by the resistor tolerances is to assume that each of the critical resistors contribute equally to the total error. The six critical resistors are R3, R7, R8, R12, R13, and R15. Worst-case tolerance build up of 0.1% resistors yields a total resistor error of 0.6% maximum. If rss errors are assumed, then the total rss error is 0.1√6 = 0.245%.

Adding the worst-case resistor tolerance error of 0.6% to the previous worst-case errors due to the active components (A- grade) yields:

• Offset Error = 0.19% + 0.6% = 0.79%
• Gain Error = 0.15% + 0.6% = 0.75%
• Full Scale Error = 0.34% + 0.6% = 0.94%

These errors assume calculated resistor values are selected and that the only errors are due to their tolerances.

Although the circuit is capable of 1% or less total error, if better accuracy is required, add offset and gain adjustment capability to the circuit. Offset can be calibrated by adjusting R7 or R8 for 4 mA output with zero input, and full-scale can then be adjusted by varying R3 for a full-scale 100 mV input. The two adjustments are independent, provided the offset is calibrated first.

Actual error data from the circuit is shown in Figure 4 with V_CC = 25 V. The total error in the output current (%FSR) is calculated by taking the difference between the ideal output current and the measured output current, dividing by the FSR (16 mA), and multiplying the result by 100.