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Device Drivers

Software such as C code and/or FPGA code, used to communicate with component's digital interface.

AD576x, AD578x, AD579x GitHub no-OS Driver Source Code

AD5780 IIO DAC Linux Driver

AD5760, AD578x, AD579x IIO DAC GitHub Linux Driver Source Code

FPGA/HDL

AD5780 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design

BeMicro FPGA Project for AD5780 with Nios driver

Features & Benefits

  • +/- 10V Industrial Level Voltage Output
  • High Precision 18-Bit Accurate
  • On-Chip Reference Buffers

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  • User Guide (1)
  • Technical Book (1)
  • Tutorial (5)
  • Circuit Note (1)
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    Circuit Function & Benefits

    The circuit shown in Figure 1 is an 18-bit linear, low noise, precision bipolar (±10 V) voltage source with a minimum amount of external components. The AD5780 DAC is an 18-bit, unbuffered voltage output DAC operating from a bipolar supply of up to 33 V. The AD5780 accepts a positive reference input range of 5 V to VDD − 2.5 V, and a negative reference input range of VSS + 2.5 V to 0 V. Both reference inputs are buffered on the chip, and external buffers are not required. The AD5780 offers a relative accuracy specification of ±1 LSB maximum, and operation is guaranteed monotonic, with a ±1 LSB maximum DNL specification.

    The AD8675 precision op amp has low offset voltage (75 μV maximum), low noise (2.8 nV/√Hz typical), and is an optimum output buffer for the AD5780. The AD5780 has two internal matched feedforward and feedback resistors, which are connected to the AD8675 op amp and provide the 10 V offset voltage. This allows an output voltage swing of ±10 V with a single external 10 V reference.

    The digital input to the circuit is serial and is compatible with standard SPI, QSPI, MICROWIRE®, and DSP interface standards. For high accuracy applications, the compact circuit offers high precision, as well as low noise—this is ensured by the combination of the AD5780, ADR445, and AD8675 precision components.

    This combination of parts provides industry-leading 18-bit integral nonlinearity (INL) of ±1 LSB and differential nonlinearity (DNL) of ±0.75 LSB, with guaranteed monotonicity, as well as low power, small PCB area, and cost effectiveness in an LFCSP package.

    Figure 1. 18-Bit Accurate, ±10V Voltage Source (Simplified Schematic: All Connections and Decoupling Not Shown)

    Circuit Description

    The digital-to-analog converter (DAC) shown in Figure 1 is the AD5780, a high voltage, 18-bit converter with SPI interface, offering ±1 LSB INL, ±0.75 LSB DNL, and 7.5 nV/√Hz noise spectral density. The AD5780 also exhibits an extremely low temperature drift of 0.005 LSB/°C.

    Figure 1 shows the AD5780 configured in a gain-of-two mode such that a single reference source can be used to generate a symmetrical bipolar output voltage range. This mode of operation uses an external op amp (A2), as well as on-chip resistors (see AD5780 data sheet), to provide the gain of 2. These internal resistors are thermally matched to each other and to the DAC ladder resistance, resulting in ratiometric thermal tracking. The output buffer is again the AD8675, used for its low noise and low drift. This amplifier is also used (A1) to amplify the +5 V reference voltage from the low noise ADR445 to +10 V. R2 and R3 in this gain circuit are precision metal foil resistors with 0.01% tolerance and a temperature coefficient resistance of 0.6 ppm/°C. For optimum performance over temperature, R1 and R2 should be in a single package, such as the Vishay 300144 or VSR144 series. R2 and R3 are selected to be 1 kΩ to keep noise in the system low. R1 and C1 form a low-pass filter with a cutoff frequency of approximately 10 Hz. The purpose of this filter is to attenuate voltage reference noise.


    Linearity Measurements

    The precision performance of the circuit shown in Figure 1 is demonstrated on the EVAL-AD5780SDZ Evaluation board using an Agilent 3458A Multimeter. Figure 2 shows the integral nonlinearity as a function of DAC code is within specifications of ±1 LSB.

    Figure 2. Integral Nonlinearity vs. DAC Code

     

    Figure 3 shows that the differential nonlinearity as a function of DAC code is within the −0.25 LSB to +0.75 LSB specification.

    Figure 3. Differential Nonlinearity vs. DAC Code

     

    Noise Drift Measurements

    To be able to realize high precision, the peak-to-peak noise at the circuit output must be maintained below 1 LSB, which is 76.29 μV for 18-bit resolution and a 20 V peak-to-peak voltage range.

    A real-time noise application will not have a high-pass cutoff at 0.1 Hz to attenuate 1/f noise but will include frequencies down to dc in its pass band. With this in mind, the measured peak-topeak noise is realistically shown in Figure 4. In this case, the noise at the output of the circuit was measured over a period of 100 seconds, effectively including frequencies as low as 0.01 Hz in the measurement. The upper frequency cutoff is at approximately 14 Hz and is limited by the measurement setup.

    Figure 4 shows the peak-to-peak values are 1.2 μV for zero-scale output, 32 μV for half-scale output, and 64 μV for full-scale output.

    The zero-scale output voltage exhibits the lowest noise because it represents the noise from the DAC core only. The noise contribution from each voltage reference path is attenuated by the DAC when the zero-scale code is selected.

    Figure 4. DAC Output Voltage Noise Measured Over 100 Second Period for Full Scale (Red), Half Scale (Green), and Zero Scale (Blue)

     

    As the time period over which the measurement is taken is increased, lower frequencies will be included, and the peak-to-peak value will increase. At low frequencies, temperature drift and thermocouple effects become contributors to noise. These effects can be minimized by choosing components with low thermal coefficients. In this circuit, the main contributor to low frequency 1/f noise is the voltage reference. It also exhibits the greatest temperature coefficient value in the circuit of 3 ppm/°C. A temperature controlled ultralow noise reference would be required to improve the half-scale and full-scale DAC output noise.

    Figure 5 shows the performance of the signal chain by replacing the ADR445 with a Krohn Hite Model 523 Precision Reference set for +5 V.

    Complete schematics and layout of the printed circuit board can be found in the CN-0200 Design Support Package: www.analog.com/CN0200-DesignSupport .

    Figure 5. DAC Output Voltage Noise Measured Over 100 Second Period for Full Scale (Red), Half Scale (Green), and Zero Scale (Blue) with Precision Reference Source

    Common Variations

    The AD5780 will support a wide variety of output ranges from 0 V to +5 V up to ±10 V, and values in between. The gain-of-2 configuration, as shown in Figure 1, can be used if a symmetrical output range is required. This mode is selected by setting the RBUF bit of the AD5780 internal control register to a Logic 0. If an asymmetrical range is required, individual references can be applied at VREFP and VREFN, and the output buffer should be configured for unity gain as described in the AD5780 data sheet. This is done by setting the RBUF bit of the AD5780 internal control register to a Logic 1.

    The AD8676 is a dual version of the AD8675 op amp and can be used in the circuit if desired.

    Software

    Circuit Evaluation & Test

    Equipment Required

    • System Demonstration Platform (EVAL-SDP-CB1Z)
    • EVAL-AD5780SDZ Evaluation Board and Software
    • Agilent 3458A multimeter
    • PC (Windows 32-bit or 64-bit)
    • National Instruments GPIB to USB-B interface cable
    • SMB cable (1)


    Software Installation

    The AD5780 evaluation kit includes self-installing software on a CD. The software is compatible with Windows XP (SP2) and Vista (32-bit and 64-bit). If the setup file does not run automatically, you can run the setup.exe file from the CD.

    Install the evaluation software before connecting the evaluation board and SDP board to the USB port of the PC to ensure that the evaluation system is correctly recognized when connected to the PC.

    1. After installation from the CD is complete, power up the AD5780 evaluation board as described in the Power Supplies section of UG-256. Connect the SDP board (via either Connector A or Connector B) to the AD5780 evaluation board and then to the USB port of your PC using the supplied cable.
    2. When the evaluation system is detected, proceed through any dialog boxes that appear. This completes the installation.
    Figure 6. Evaluation Software Main Window

     

    Functional Diagram

    A functional diagram of the test setup is shown in Figure 7.

    Figure 7. Functional Block Diagram of Test Setup

     

    Power Supply Configuration

    The following supplies must be provided:

    • 3.3 V between the VCC and DGND on Connector J1 for the digital supply of the AD5780. Alternatively, place Link 1 in Position A to power the digital circuitry from the USB port via the SDP board (default setting).
    • +12 V to +16.5 V between the VDD and AGND inputs of J2 for the positive analog supply of the AD5780.
    • −12 V to −16.5 V between the VSS and AGND inputs of J2 for the negative analog supply of the AD5780.


    Link Configuration Setup

    The default link options are listed in Table 1. By default, the board is configured with VREFP = +10 V and VREFN = −10 V for a ±10 V output range.

    Table 1. Default Link Options
    Link No. Option
    LK1 A
    LK2 B
    LK3 A
    LK4 Removed
    LK5 Removed
    LK6 Removed
    LK7 Removed
    LK8 C
    LK9 Inserted
    LK11 Inserted

     

    To configure the board for the circuit shown in Figure 1, the following changes must be made to the default link configuration in Table 1:

    1. Place LK3 in position B.
    2. Insert LK4.
    3. Place LK8 in position B.

    These changes configure the output buffer amplifier for a gain of 2 and connect the VREFN pin of the AD5780 to ground.

    Please refer to User Guide UG-256 for more information on the EVAL-AD5780SDZ test setup.


    Test

    The VOUT_BUF SMB connector is connected to the Agilent 3458A multimeter. The linearity measurements are run using the Measure DAC Output Tab on the AD5780 GUI.

    The noise drift measurement is measured on the VOUT_BUF SMB connector also. The output voltage is set using the Program Voltage tab in the AD5780 GUI. The peak-to-peak noise drift is measured over 100 seconds.

    For more details on the definitions and how to calculate the INL, DNL, and noise from the measured data, see the "TERMINOLOGY" section of the AD5780 data sheet and also the following reference: Data Conversion Handbook, "Testing Data Converters," Chapter 5, Analog Devices.