CN0216

Figure 2 shows the actual test setup. For testing purposes, a 6-wire Tedea-Huntleigh 505H-0002-F070 load cell is used.

Current flowing through a PCB trace produces an IR voltage drop, and with longer traces, this voltage drop can be several millivolts or more, introducing a considerable error. A 1 inch long, 0.005 inch wide trace of 1 oz copper has a resistance of approximately 100 mΩ at room temperature. With a load current of 10 mA, this can introduce a 1 mV error.

A 6-wire load cell has two sense pins, in addition to the excitation, ground, and two output connections. The sense pins are connected to the high side (excitation pin) and low side (ground pin) of the Wheatstone bridge. The voltage developed across the bridge can be accurately measured regardless of the voltage drop due to wire resistance. In addition, the AD7791 accepts differential analog inputs and a differential reference as well. These two sense pins are connected to the AD7791 reference inputs to create a ratiometric configuration that is immune to low frequency changes in the power supply excitation voltage. The ratiometric connection eliminates the need for a precision voltage reference.

Unlike a 6-wire load cell, a 4-wire load cell does not have sense pins, and the ADC differential reference pins are connected directly to the excitation voltage and ground. With this connection, there exists a voltage difference between the excitation pin and the reference pin on the ADC due to wire resistance. There will also be a voltage difference on the low side (ground) due to wire resistance. The system will not be completely ratiometric.

The Tedea-Huntleigh 2 kg load cell has a sensitivity of 2 mV/V and a full-scale output of 10 mV when the excitation voltage is 5 V. A load cell also has an offset, or TARE, associated with it. In addition, the load cell also has a gain error. Some customers use a DAC to remove or null the TARE. When the AD7791 uses a 5 V reference, its differential analog input range is equal to ±5 V, or 10 V p-p. The circuit in Figure 1 amplifies the load cell output by a factor of 375 (1 + 2R1/RG), so the full-scale input range referred to the load cell output is 10 V/375 = 27 mV p-p. This extra range relative to the 10 mV p-p load cell full-scale signal is beneficial as it ensures that the offset and gain error of the load cell do not overload the ADC’s front end.

The low-level amplitude signal from the load cell is amplified by two ADA4528-1 zero-drift amplifiers. A zero-drift amplifier, as the name suggests, has a close to zero offset voltage drift. The amplifier continuously self-corrects for any dc errors, making it as accurate as possible. Besides having low offset voltage and drift, a zero-drift amplifier also exhibits no 1/f noise. This important feature allows precision weigh scale measurement at dc or low frequency.

The two ADA4528-1 op amps are configured as the first stage of a three op amp instrumentation amplifier. A third op amp connected as a difference amplifier would normally be used for the second stage, but in the circuit of Figure 1, the differential input of the AD7791 performs this function.

The gain is equal to 1 + 2R1/RG. Capacitors C1 and C2 are placed in the feedback loops of the op amps and form 4.3 Hz cutoff frequency low-pass filters with R1 and R2. This limits the amount of noise entering the sigma-delta ADC. C5 in conjunction with R3 and R4 form a differential filter with a cutoff frequency of 8 Hz, which further limits the noise. C3 and C4 in conjunction with R3 and R4 form common-mode filters with a cutoff frequency of 159 Hz.

The ADP3301 low noise regulator powers the AD7791, ADA4528-1, and the load cell. In addition to decoupling capacitors, a noise reduction capacitor is placed on the regulator output as recommended in the ADP3301 data sheet. It is essential that the regulator is low noise, because any noise on the power supply or ground plane introduces noise into the system and degrades the circuit performance.

The 24-bit sigma-delta ADC AD7791 converts the amplified signal from the load cell. The AD7791 is configured to operate in the buffered mode to accommodate the impedance of the R-C filter network on the analog input pins.

Figure 3 shows the AD7791’s rms noise for different output data rates. This plot shows that the rms noise increases as the output data rate increases. However, the device maintains good noise performance over the complete range of output data rates.

The AD7791 rms noise of 1.1 μV for a 9.5 Hz output data rate and a reference of 2.5 V yields the following number of noise-free counts:

where the factor of 6.6 converts the rms voltage into a peak-to-peak voltage.

The corresponding noise-free code resolution is, therefore:

Note that this represents the performance of the AD7791 without the load cell or the input amplifier connected.

The ADA4528-1 has 5.9 nV/√Hz of voltage noise density and, therefore, the input amplifiers and resistors will add noise to the system. In addition, the load cell itself will add noise.

In the circuit of Figure 1, a 5 V reference is used, therefore, the peak-to-peak input range is 10 V. The LSB is, therefore, equal to

The 10 mV p-p full-scale signal from the load cell produces a 3.75 V p-p signal into the ADC, which is approximately 38% of the ADC range.

Seven sets of 500 samples each were taken with the load cell connected (no load). The peak-to-peak code spread for each sample set was calculated, and the seven values averaged to yield a code spread of 159 counts. This corresponds to 159 × 0.596 μV = 94.8 μV p-p noise based on a full-scale input to the ADC of 3.75 V p-p.

Therefore, the number of noise-free counts is

Therefore, the corresponding noise-free code resolution of the total system is:

Figure 4 shows a plot of the ADC codes for 500 samples (52.6 sec for 9.5 Hz data rate). Note that the peak-to-peak spread is about 160 codes.

Figure 5 shows the same data presented in a histogram. Figure 4 and Figure 5 show the actual (raw) conversions read back from the AD7791. In practice, a digital post filter is typically used in a weigh scale system. The additional averaging that is performed in the post filter will further improve the number of noise-free counts at the expense of a reduced data rate.

The resolution of the system in grams can be calculated by

As with any high accuracy circuit, proper layout, grounding, and decoupling techniques must be employed. See Tutorial MT-031, Grounding Data Converters and Solving the Mystery of AGND and DGND and Tutorial MT-101, Decoupling Techniques for more details. A complete design support package for this circuit note can be found at www.analog.com/CN0216-DesignSupport.