MAX9172
PRODUCTIONSingle/Dual LVDS Line Receivers with "In-Path" Fail-Safe
Single/Dual LVDS Line Receivers with In-Path Fail-Safe are Designed for High-Speed Applications Requiring Minimum Power Consumption, Space, and Noise
- Part Models
- 4
- 1ku List Price
- Starting From $3.89
Part Details
- Input Accepts LVDS and LVPECL
- In-Path Fail-Safe Circuit
- Space-Saving 8-Pin TDFN and SOT23 Packages
- Fail-Safe Circuitry Sets Output High for Open, Undriven Shorted, or Undriven Terminated Output
- Flow-Through Pinout Simplifies PCB Layout
- Guaranteed 500Mbps Data Rate
- Second Source to DS90LV018A and DS90LV028A (SO Packages Only)
- Conforms to ANSI TIA/EIA-644 Standard
- 3.3V Supply Voltage
- -40°C to +85°C Operating Temperature Range
- Low-Power Dissipation
The MAX9171/MAX9172 single/dual low-voltage differential signaling (LVDS) receivers are designed for high-speed applications requiring minimum power consumption, space, and noise. Both devices support switching rates exceeding 500Mbps while operating from a single 3.3V supply.
The MAX9171 is a single LVDS receiver and the MAX9172 is a dual LVDS receiver. Both devices conform to the ANSI TIA/EIA-644 LVDS standard and convert LVDS to LVTTL/LVCMOS-compatible outputs. A fail-safe feature sets the outputs high when the inputs are undriven and open, terminated, or shorted. The MAX9171/MAX9172 are available in 8-pin SO packages and space-saving thin DFN and SOT23 packages.
For lower skew devices, refer to the MAX9111/MAX9113 data sheet.
Applications
- Cellular Phone Base Stations
- Clock Distribution
- Digital Copiers
- Laser Printers
- LCD Displays
- Multipoint Backplane Interconnect
- Network Switches/Routers
Documentation
Data Sheet 1
Reliability Data 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
---|---|---|---|
MAX9172EKA+ | 8-SOT_23-N/A | ||
MAX9172EKA+T | 8-SOT_23-N/A | ||
MAX9172ESA+ | Small-Outline IC, Narrow (0.15in) | ||
MAX9172ESA+T | Small-Outline IC, Narrow (0.15in) |
Part Models | Product Lifecycle | PCN |
---|---|---|
Feb 4, 2015 - 1341_CANCELLATION ASSEMBLY |
||
MAX9172EKA+ | PRODUCTION | |
MAX9172EKA+T | PRODUCTION | |
May 22, 2018 - 1702N ASSEMBLY |
||
MAX9172ESA+ | PRODUCTION | |
MAX9172ESA+T | PRODUCTION |
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
Parts | Product Life Cycle | Description |
---|---|---|
Data Path Management 5 | ||
MAX9111 | PRODUCTION | Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 |
MAX9130 | PRODUCTION | Single 500Mbps LVDS Line Receiver in SC70 |
MAX9113 | PRODUCTION | Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 |
MAX9121 | PRODUCTION | Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout |
MAX9122 | PRODUCTION | Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout |
Product 4 | ||
MAX9159 | Dual LVDS Line Receiver | |
MAX9115 | Single LVDS Line Receiver in SC70 | |
MAX9125 | Quad LVDS Line Receivers with Integrated Termination | |
MAX9126 | Quad LVDS Line Receivers with Integrated Termination |
Tools & Simulations
IBIS Model 1
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