MAX9159

Dual LVDS Line Receiver

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Overview

  • Pin Compatible with SN65LVDS9637
  • Fail-Safe Circuit Sets Output High for Undriven Inputs
  • Conforms to ANSI TIA/EIA-644 Standard
  • Single 3.3V Supply
  • Designed for Data Rates up to 400Mbps
  • ±100mV (max) Differential Input Threshold
  • 2.2ns (typ) Propagation Delay
  • ±8kV ESD Protection for LVDS Inputs
  • Low-Voltage TTL (LVTTL) Logic Output Levels
  • The MAX9159 dual low-voltage differential signaling (LVDS) receiver is ideal for applications requiring high speed, low power, and low noise. The MAX9159 is pin compatible with the SN65LVDS9637. The MAX9159 conforms to the ANSI TIA/EIA-644 LVDS standard and converts LVDS to LVTTL-compatible outputs. A fail-safe feature sets the output high when the inputs are undriven and open, terminated, or shorted. The MAX9159 is available in an 8-pin SO package and fully specified for the -40°C to +85°C extended temperature range.

    Refer to the MAX9111/MAX9113 data sheet for higher performance single/dual LVDS line receivers in SOT23 and SO packages. Refer to the MAX9110/MAX9112 data sheet for single/dual LVDS line drivers in SOT23 and SO packages.

    Applications

    • Backplane and Interconnect Applications
    • Cell Phone Base Stations
    • Clock/Data Distribution
    • Digital Copiers
    • LCD Displays
    • Network Routers and Switches
    • Telecom Switching Equipment

    MAX9159
    Dual LVDS Line Receiver
    MAX9159: Typical Operating Circuit
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    Documentation

    Data Sheet 1

    Reliability Data 1

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    Hardware Ecosystem

    Parts Product Life Cycle Description
    Interface Receivers 1
    MAX9113 PRODUCTION Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
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