Overview
Features and Benefits
- Lockbox™ Secure Technology: Hardware-enabled security for code and content protection.
- Blackfin Processor Core with up to 600 MHz (1200 MMACS) performance
- 2 dual-channel, full-duplex synchronous serial ports supporting 8 stereo I2S channels
- 12 peripheral DMA channels supporting one- and two-dimensional data transfers
- NAND Flash Controller with 8-Bit interface for commands, addresses and data.
- Connectivity: Host DMA Port, UART’s, SPORT’s, SPI and TWI.
- Memory controller providing glue-less connection to multiple banks of external SDRAM, SRAM, Flash, or ROM
- 289-ball, 12×12 mm, 0.5 mm pitch mini-BGA (Commercial temperature range 0°C to +70°C)
- 208-ball, 17×17 mm, 0.8 mm pitch mini-BGA (Commercial temperature range 0°C to +70°C; Industrial temperature range -40°C to +85°C*)
Product Details
The ADSP-BF523 Blackfin Processor combines high performance, power efficiency and system integration to enable highly optimized designs without compromises. With built-in peripheral selectivity the BF523 provides the greatest flexibility for today’s most demanding convergent signal processing applications. With power consumption as low as 0.23 mW/MHz and performance up to 600 MHz, applications can now add greater signal processing performance without forgoing battery life.
Configured as a co-processor in applications where flexibility is required to support a variety of multimedia applications, the ADSP-BF523 offers the processing performance along with scaleable power management that provides developers that flexibility in their design. For battery powered applications that either enhance the multimedia experience or deliver a full Mobile TV implementation, the ADSP-BF523 represents the ideal solution to release design innovation.
IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF523 provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.
Product Categories
Markets and Technologies
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (3)
Documentation & Resources
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EE-112: Class Implementation in Analog C++11/14/2016
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EE-213: Host Communication via the Asynchronous Memory Interface for Blackfin® Processors (Rev. 2)2/14/2015
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EE-350: Seamlessly Interfacing MEMS Microphones with Blackfin Processors (Rev. 1)8/27/2010
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• EE-350: Code Example
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EE-335: Interfacing SD Cards with Blackfin Processors (Rev. 1)3/4/2010
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• EE-335: Code Example
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EE-347: Formatted Print to a UART Terminal with Blackfin® Processors (Rev. 3)2/2/2010
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• EE-347: Code example
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EE-339: Using External Switching Regulators with Blackfin® Processors (Rev. 1)8/18/2009
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EE-326: Blackfin® Processor and SDRAM Technology (Rev. 2)8/18/2009
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• EE-326: Code example
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EE-271: Using Cache Memory on Blackfin® Processors (Rev. 2)8/18/2009
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• EE-271: Code example
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EE-340: Connecting SHARC® and Blackfin® Processors over SPI (Rev. 1)5/8/2009
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• EE-340: Code example
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EE-337: Host DMA Port on ADSP-BF52x and ADSP-BF54x Blackfin® Processors (Rev. 1)5/8/2009
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• EE-337: Code example
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EE-301: Video Templates for Developing Multimedia Applications on Blackfin® Processors (Rev. 1)5/8/2009
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• EE-301: Video Template Code
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EE-312: Building Complex VDK/LwIP Applications Using Blackfin® Processors (Rev. 2)10/8/2008
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• EE-312: Code example
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EE-344: Using the NAND Flash Controller on Blackfin Processors (Rev. 1)10/7/2008
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• Code example
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EE-281: Hardware Design Checklist for the Blackfin® Processors (Rev. 2)7/7/2008
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EE-341: Expert Pin Multiplexing Plug-in for Blackfin® Processors (Rev. 3)5/18/2008
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• EE-341: Code Example
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EE-334: Using Blackfin® Processor Hibernate State for Low Standby Power (Rev. 1)5/17/2008
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• EE-334: Associated ZIP File
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EE-204: Blackfin® Processor SCCB Software Interface for Configuring I2C® Slave Devices (Rev. 2)3/26/2008
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• EE-204: Associated Code (Rev 3, 02/2008)
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EE-333: Interfacing Blackfin® Processors to Winbond W25X16 SPI Flash Devices (Rev. 1)3/25/2008
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• EE-333: Associated Code
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EE-323: Implementing Dynamically Loaded Software Modules (Rev. 1)3/8/2008
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• EE-323: Associated Code
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EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev. 1)8/31/2007
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EE-185: Fast Floating-Point Arithmetic Emulation on Blackfin® Processors (Rev. 4)8/28/2007
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• EE-185: Associated Code (Rev 4, 08/2007)
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EE-325: Interfacing Atmel Fingerprint Sensor AT77C104B with Blackfin® Processors (Rev. 1)8/20/2007
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• EE-325: Code Example
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EE-324: System Optimization Techniques for Blackfin® Processors (Rev. 1)7/12/2007
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• EE-324: Associated Code
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EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev. 14)5/21/2007
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• EE-175: Associated Files
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EE-311: VisualDSP++® Flash Programmer API for Blackfin® Processors (Rev. 1)12/15/2006
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• EE-311: Code Example
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EE-307: Blackfin® Processor Troubleshooting Tips Using VisualDSP++® Tools (Rev. 1)12/14/2006
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EE-308: Estimating and Optimizing Booting Time for Blackfin® Processors (Rev. 1)12/13/2006
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• EE-308: Associated ZIP File
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EE-309: Power Mode Transition Times of Blackfin® Processors (Rev. 1)12/6/2006
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EE-306: PGO Linker - A Code Layout Tool for Blackfin Processors (Rev. 1)12/5/2006
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• EE-306: Associated File
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EE-304: Using the Blackfin® Processor SPORT to Emulate a SPI Interface (Rev. 1)11/15/2006
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• EE-304: Associated Source Code
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EE-303: Using VisualDSP++® Thread-Safe Libraries with a Third-Party RTOS (Rev. 1)11/15/2006
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EE-302: Interfacing ADSP-BF53x Blackfin® Processors to NAND FLASH Memory (Rev. 1)11/15/2006
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EE-276: Video Framework Considerations for Image Processing on Blackfin® Processors (Rev. 1)11/8/2005
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EE-269: A Beginner’s Guide to Ethernet 802.3 (Rev. 1)6/7/2005
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EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev. 1)2/15/2005
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EE-257: A Boot Compression/Decompression Algorithm for Blackfin® Processors (Rev. 1)12/16/2004
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• EE-257 Software Code
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EE-236: Real-Time Solutions Using Mixed-Signal Front-End Devices with the Blackfin® Processor (Rev. 1)7/21/2004
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• EE-236 Software Code
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EE-234: Interfacing T1/E1 Transceivers/Framers to Blackfin® Processors via the Serial Port (Rev. 1)7/21/2004
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• Software Code and Schematics
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EE-235: An Introduction to Scripting in VisualDSP++® (Rev. 1)5/19/2004
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EE-183: Rational Sample Rate Conversion with Blackfin® Processors (Rev. 5)10/30/2003
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• EE-183 Software Code
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EE-197: ADSP-BF531/532/533 Blackfin® Processor Multi-cycle Instructions and Latencies10/8/2003
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EE-192: Using C To Create Interrupt-Driven Systems On Blackfin® Processors5/30/2003
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EE-68: Analog Devices JTAG Emulation Technical Reference (Rev. 10)12/20/2002
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EE-149: Tuning C Source Code for the Blackfin® Processor Compiler12/16/2002
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EE-128: DSP in C++: Calling Assembly Class Member Functions From C++9/18/2002
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EE-110: A Quick Primer on ELF and DWARF File Formats5/17/2000
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EE-104: Setting Up Streams with the VisualDSP Debugger11/5/1999
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• EE-104 Software Code
ZIP
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VisualDSP++® 5.0 Assembler and Preprocessor Manual (Rev. 3.4)11/15/2009
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VisualDSP++® 5.0 C/C++ Compiler and Library Manual for Blackfin Processors (Rev. 5.4)11/13/2009
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Documentation Errata
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VisualDSP++® 5.0 Loader and Utilities Manual (Rev. 2.5)11/13/2009
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Documentation Errata
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VisualDSP++® 5.0 Device Drivers and System Services Manual for Blackfin Processors (Rev. 4.3)11/13/2009
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Documentation Errata
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VisualDSP++® 5.0 Licensing Guide (Rev. 1.4)11/13/2009
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VisualDSP++® 5.0 Kernel (VDK) Users Guide (Rev. 3.5)11/13/2009
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VisualDSP++® 5.0 Linker and Utilities Manual (Rev. 3.5)11/13/2009
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VisualDSP++® 5.0 Users Guide (Rev. 3.0)12/9/2007
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VisualDSP++® 5.0 Quick Installation Reference Card (Rev. 3.1)8/30/2007
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VisualDSP++® 5.0 Getting Started Guide (Rev. 3.0)8/30/2007
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Documentation Errata
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VisualDSP++® 5.0 Product Release Bulletin (Rev. 3.0)8/30/2007
Software & Systems Requirements
Software & Tools Anomaly
Middleware
Lightweight TCP/IP (lwIP) Stack
OBSOLETE: The Lightweight TCP/IP (lwIP) Stack for CrossCore Embedded Studio is an implementation of this widely accepted TCP/IP stack for embedded platforms supporting most of the networking protocols in the TCP/IP suite.
Software Development Tools
CrossCore® Embedded Studio
CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.
Tools & Simulations
Design Tool
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
| Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
|---|---|---|---|---|
| ADSP-BF523BBCZ-5A | Material Declaration | Reliability Data | 208-Ball CSPBGA (17mm x 17mm x 1.75mm) | |
| ADSP-BF523KBCZ-5 | Material Declaration | Reliability Data | 289-Ball CSPBGA (12mm x 12mm x 1.26mm) | |
| ADSP-BF523KBCZ-6A | Material Declaration | Reliability Data | 208-Ball CSPBGA (17mm x 17mm x 1.75mm) | |
| Wafer Fabrication Data |
PCN-PDN Information
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.