AD9518-1

RECOMMENDED FOR NEW DESIGNS

6-Output Clock Generator with Integrated 2.5 GHz VCO

Data Sheet (Rev. D) Product Selection Table
Part Models
4
1ku List Price
Starting From $7.56
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Part Details

  • Low phase noise, phase-locked loop (PLL)
    For more information please refer to the data sheet
  • 3 pairs of 1.6 GHz LVPECL outputs
    Each output pair shares a 1-to-32 divider with coarse phase delay
    Additive output jitter: 225 fs rms
    Channel-to-channel skew paired outputs of <10 ps
  • Automatic synchronization of all outputs on power-up
  • Manual output synchronization available
  • Available in a 48-lead LFCSP

 
AD9518-1
6-Output Clock Generator with Integrated 2.5 GHz VCO
AD9518-1 Functional Block Diagram AD9518-1 Pin Configuration
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Documentation

Data Sheet 1

User Guide 1

Application Note 11

Technical Articles 6

Frequently Asked Question 1

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Software Resources

Device Drivers 1

Hardware Ecosystem

Parts Product Life Cycle Description
High Speed Comparators (<100ns Propagation Delay) 1
LTC6957
Low Phase Noise, Dual Output Buffer/Driver/Logic Converter
Integer-N PLL 1
ADF4002
RECOMMENDED FOR NEW DESIGNS Phase Detector / PLL Frequency Synthesizer
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Tools & Simulations

AD9587-x IBIS Models 1

ADIsimCLK Design and Evaluation Software

ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.

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Evaluation Kits

EVAL-AD9518-1

AD9518- 1 Evaluation Board

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Features and Benefits

  • Simple power connection using 6 V wall adapter and on-board LDO voltage regulators
  • LDOs are easily bypassed for power measurements
  • 8 ac-coupled differential LVPECL SMA connectors
  • 2 ac-coupled LVPECL differential headers
  • 2 dc-coupled differential LVDS SMA connectors that are reconfigurable to four CMOS SMA connectors
  • 2 dc-coupled LVDS differential headers that are reconfigurable to four CMOS connectors
  • SMA connectors for
    2 reference inputs
    Charge pump output
    Clock distribution input
  • USB connection to PC
  • Microsoft Windows-based evaluation software with simple graphical user interface
  • On-board PLL loop filter
  • Easy access to digital I/O and diagnostic signals via I/O header
  • Status LEDs for diagnostic signals

Product Details

The AD9516-x, AD9517-x, and AD9518-x are very low noise PLL clock synthesizers featuring an integrated VCO, clock dividers, and up to 14 outputs. The AD9516 features automatic holdover and a flexible reference input circuit allowing for very smooth reference clock switching. The AD9516 family also features the necessary provisions for an external VCXO.

The AD9516 evaluation board is a compact, easy-to-use platform for evaluating all features of the AD9516. The AD9516, AD9517, and AD9518 differ only in package size, and the number of outputs. The evaluation software main window for the AD9517 and AD9518 reflects fewer outputs, but the operation is identical for all devices.

Use the user guide in conjunction with the AD9516, AD9517, and AD9518 data sheets.
EVAL-AD9518-1
AD9518- 1 Evaluation Board

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