ADRV9032R

RECOMMENDED FOR NEW DESIGNS

Integrated 2T2R TDD and FDD RadioVerse Transceiver with Dual Observation Paths

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Overview

  • 2 differential transmitters
  • 2 differential receivers
  • 2 differential observation receivers
  • LO tunable range: 450 MHz to 7125 MHz
  • RF range: 350 MHz to 7225 MHz1
  • Maximum transmitter large-signal bandwidth: 200 MHz
  • Maximum transmitter synthesis bandwidth: 450 MHz
  • Maximum receiver signal bandwidth: 200 MHz
  • Maximum observation receiver signal bandwidth: 450 MHz
  • Fully integrated fractional-N RF synthesizer
  • Fully integrated clock synthesizer
  • Dual external LO inputs supporting operation up to 6 GHz
  • JESD204B and JESD204C digital interface: up to 16.5 Gbps
  • TDD and FDD operation
  • Simplifying thermal and power consumption challenges
    • 4.82 W power consumption for the TDD mode, enabled use case with 200 MHz iBW/OBW2

The ADRV9032R is a highly integrated, RF agile transceiver offering two transmitters, two observation receivers for monitoring transmitter channels, two receivers, integrated local oscillator (LO) and clock synthesizers, and digital-signal processing functions to provide a complete transceiver solution. The device provides the high radio performance and low-power consumption demanded by cellular infrastructure applications, software-defined radios, portable instruments, and military communications.

The receiver and transmitter signal paths use a zero-IF (ZIF) architecture that provides wide bandwidth with dynamic range suitable for non-contiguous multicarrier applications. The ZIF architecture has the benefits of low power and RF and bandwidth agility. The lack of aliases and out-of-band images eliminates anti-aliasing and image filters, reducing system size and cost, and making band independent solutions possible.

Please see the Data Sheet for the full description.

APPLICATIONS

  • Software defined radios
  • Portable instrumentation
  • Military communications
  • General-purpose radios
  • Wireless infrastructure
  • TDD and FDD applications

ADRV9032R
Integrated 2T2R TDD and FDD RadioVerse Transceiver with Dual Observation Paths
ADRV9032R Functional Block Diagram ADRV9032R Chip Illustration
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Documentation

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Software Resources

API Device Drivers 1

Device Application Programming Interface (API) C code drivers provided as reference code allows the user to quickly configure the product using high-level function calls. The library acts as an abstraction layer between the application and the hardware. The API is developed in C99 to ensure agnostic processor and operating system integration. Customers can port this application layer code to their embedded systems/ Baseband Processor by integrating their platform-specific code base to the API HAL layer. To request this software package, go to the Software Request Form signed in with your MyAnalog account and under “Target Technology option - select “Wireless Communications" and choose processor/SOC as "ADRV9032R " , select the check box as well and submit the form. You will receive an email notification with a link for software download.


Hardware Ecosystem

Parts Product Life Cycle Description
Switching Regulators & Controllers 1
LT8625S RECOMMENDED FOR NEW DESIGNS 18V/8A Step-Down Silent Switcher 3 with Ultralow Noise Reference
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Evaluation Kits

eval board
ADS10-V1EBZ

ADS10-V1EBZ Evaluation Board

Features and Benefits

Xilinx Virtex Ultrascale+ XCVU35P-3FSHV2892E FPGA.

  • One (1) FMC+ connector.
  • Twenty (24) 32.75Gbps transceivers supported by one (1) FMC+ connector.
  • On-board HBM DRAM in FPGA.
  • Simple USB 3.0 port interface.

Product Details

When connected to a specified Analog Devices high speed converter evaluation board, the ADS10-V1EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS10-V1EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.

eval board
EVAL-ADRV903x

ADRV903x Evaluation System User Guide

Product Details

The ADRV903x family evaluation system enables customers to evaluate an ADRV903x device without having to develop custom hardware or software. The system is comprised of an ADRV903x customer evaluation (CE) board and an ADS10-V1EBZ motherboard with accompanying wall adapter power supplies for both. The evaluation software uses the Analysis | Control | Evaluation (ACE) software developed by Analog Devices, Inc., extended by an ADRV903x specific board plugin. This plugin can be run with ACE on a Windows® host PC communicating with the ADS10-V1EBZ motherboard using Ethernet. The ADS10-V1EBZ functions as a baseband processor running an application (ADRV903x command server) for controlling and communicating with the ADRV903x device.

This document also serves as a quick startup guide for the ADRV903x Configurator, which is built into the ADRV903x board plugin for ACE. The ADRV903x Configurator allows the user to explore various configurations of an ADRV903x device to arrive at a desired use case configuration. The ADRV903x Configurator also provides an overview of the frequency responses of the receiver (Rx), transmitter (Tx), and the observation receiver (ORx) datapaths for a chosen configuration.

This user guide details the steps required to install the ADRV903x evaluation software, program an existing use case, and evaluate the ADRV903x transmitter, receiver, and observation receiver datapaths. The ADRV903x Configurator sections of this user guide enable the user to generate a new use case and view its corresponding datapath configurations and filter graphs for the ADRV903x. Note that this document updates as the ADRV903x Configurator development progresses and as additional functions are added to the tool.

ADS10-V1EBZ
ADS10-V1EBZ Evaluation Board
ADS10-V1EBZ - Top View ADS10-V1EBZ - Bottom View ADS10-V1EBZ - Angle View
EVAL-ADRV903x
ADRV903x Evaluation System User Guide
EVAL-ADRV903x Board Photo Angle View EVAL-ADRV903x Board Photo Top View EVAL-ADRV903x Board Photo Bottom View

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